204 lines
9.1 KiB
C++
204 lines
9.1 KiB
C++
// -*- mode:c++ -*-
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// Copyright (c) 2007 The Hewlett-Packard Development Company
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// All rights reserved.
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//
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// Redistribution and use of this software in source and binary forms,
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// with or without modification, are permitted provided that the
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// following conditions are met:
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//
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// The software must be used only for Non-Commercial Use which means any
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// use which is NOT directed to receiving any direct monetary
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// compensation for, or commercial advantage from such use. Illustrative
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// examples of non-commercial use are academic research, personal study,
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// teaching, education and corporate research & development.
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// Illustrative examples of commercial use are distributing products for
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// commercial advantage and providing services using the software for
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// commercial advantage.
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//
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// If you wish to use this software or functionality therein that may be
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// covered by patents for commercial use, please contact:
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// Director of Intellectual Property Licensing
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// Office of Strategy and Technology
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// Hewlett-Packard Company
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// 1501 Page Mill Road
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// Palo Alto, California 94304
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//
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// Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer. Redistributions
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// in binary form must reproduce the above copyright notice, this list of
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// conditions and the following disclaimer in the documentation and/or
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// other materials provided with the distribution. Neither the name of
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// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission. No right of
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// sublicense is granted herewith. Derivatives of the software and
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// output created using the software may be prepared, but only for
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// Non-Commercial Uses. Derivatives of the software may be shared with
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// others provided: (i) the others agree to abide by the list of
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// conditions herein which includes the Non-Commercial Use restrictions;
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// and (ii) such Derivatives of the software include the above copyright
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// notice to acknowledge the contribution from this software where
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// applicable, this list of conditions and the disclaimer below.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Gabe Black
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////////////////////////////////////////////////////////////////////
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//
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// Code to "specialize" a microcode sequence to use a particular
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// variety of operands
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//
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let {{
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# This code builds up a decode block which decodes based on switchval.
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# vals is a dict which matches case values with what should be decoded to.
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# Each element of the dict is a list containing a function and then the
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# arguments to pass to it.
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def doSplitDecode(switchVal, vals, default = None):
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blocks = OutputBlocks()
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blocks.decode_block = 'switch(%s) {\n' % switchVal
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for (val, todo) in vals.items():
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new_blocks = todo[0](*todo[1:])
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new_blocks.decode_block = \
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'\tcase %s: %s\n' % (val, new_blocks.decode_block)
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blocks.append(new_blocks)
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if default:
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new_blocks = default[0](*default[1:])
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new_blocks.decode_block = \
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'\tdefault: %s\n' % new_blocks.decode_block
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blocks.append(new_blocks)
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blocks.decode_block += '}\n'
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return blocks
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}};
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let {{
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def doRipRelativeDecode(Name, opTypes, env):
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# print "RIPing %s with opTypes %s" % (Name, opTypes)
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normBlocks = specializeInst(Name + "_M", copy.copy(opTypes), copy.copy(env))
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ripBlocks = specializeInst(Name + "_P", copy.copy(opTypes), copy.copy(env))
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blocks = OutputBlocks()
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blocks.append(normBlocks)
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blocks.append(ripBlocks)
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blocks.decode_block = '''
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if(machInst.modRM.mod == 0 &&
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machInst.modRM.rm == 5 &&
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machInst.mode.submode == SixtyFourBitMode)
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{ %s }
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else
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{ %s }''' % \
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(ripBlocks.decode_block, normBlocks.decode_block)
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return blocks
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}};
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let {{
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class OpType(object):
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parser = re.compile(r"(?P<tag>[A-Z]+)(?P<size>[a-z]*)|(r(?P<reg>[A-Z0-9]+)(?P<rsize>[a-z]*))")
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def __init__(self, opTypeString):
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match = OpType.parser.search(opTypeString)
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if match == None:
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raise Exception, "Problem parsing operand type %s" % opTypeString
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self.reg = match.group("reg")
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self.tag = match.group("tag")
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self.size = match.group("size")
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if not self.size:
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self.size = match.group("rsize")
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ModRMRegIndex = "(MODRM_REG | (REX_R << 3))"
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ModRMRMIndex = "(MODRM_RM | (REX_B << 3))"
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InstRegIndex = "(OPCODE_OP_BOTTOM3 | (REX_B << 3))"
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# This function specializes the given piece of code to use a particular
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# set of argument types described by "opTypes".
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def specializeInst(Name, opTypes, env):
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# print "Specializing %s with opTypes %s" % (Name, opTypes)
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while len(opTypes):
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# Parse the operand type string we're working with
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opType = OpType(opTypes[0])
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opTypes.pop(0)
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if opType.tag not in ("I", "J"):
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if opType.size:
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env.setSize(opType.size)
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if opType.reg:
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#Figure out what to do with fixed register operands
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#This is the index to use, so we should stick it some place.
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if opType.reg in ("A", "B", "C", "D"):
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env.addReg("INTREG_R%sX" % opType.reg)
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else:
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env.addReg("INTREG_R%s" % opType.reg)
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Name += "_R"
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elif opType.tag == "B":
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# This refers to registers whose index is encoded as part of the opcode
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Name += "_R"
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env.addReg(InstRegIndex)
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elif opType.tag == "M":
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# This refers to memory. The macroop constructor sets up modrm
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# addressing. Non memory modrm settings should cause an error.
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env.doModRM = True
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return doRipRelativeDecode(Name, opTypes, env)
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elif opType.tag == None or opType.size == None:
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raise Exception, "Problem parsing operand tag: %s" % opType.tag
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elif opType.tag == "C":
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# A control register indexed by the "reg" field
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env.addReg(ModRMRegIndex)
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Name += "_C"
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elif opType.tag == "D":
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# A debug register indexed by the "reg" field
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env.addReg(ModRMRegIndex)
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Name += "_D"
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elif opType.tag == "S":
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# A segment selector register indexed by the "reg" field
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env.addReg(ModRMRegIndex)
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Name += "_S"
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elif opType.tag in ("G", "P", "T", "V"):
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# Use the "reg" field of the ModRM byte to select the register
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env.addReg(ModRMRegIndex)
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Name += "_R"
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elif opType.tag in ("E", "Q", "W"):
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# This might refer to memory or to a register. We need to
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# divide it up farther.
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regEnv = copy.copy(env)
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regEnv.addReg(ModRMRMIndex)
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# This refers to memory. The macroop constructor should set up
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# modrm addressing.
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memEnv = copy.copy(env)
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memEnv.doModRM = True
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return doSplitDecode("MODRM_MOD",
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{"3" : (specializeInst, Name + "_R", copy.copy(opTypes), regEnv)},
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(doRipRelativeDecode, Name, copy.copy(opTypes), memEnv))
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elif opType.tag in ("I", "J"):
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# Immediates
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Name += "_I"
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elif opType.tag == "O":
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# Immediate containing a memory offset
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Name += "_MI"
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elif opType.tag in ("PR", "R", "VR"):
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# Non register modrm settings should cause an error
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env.addReg(ModRMRMIndex)
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Name += "_R"
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elif opType.tag in ("X", "Y"):
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# This type of memory addressing is for string instructions.
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# They'll use the right index and segment internally.
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Name += "_M"
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else:
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raise Exception, "Unrecognized tag %s." % opType.tag
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# Generate code to return a macroop of the given name which will
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# operate in the "emulation environment" env
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return genMacroop(Name, env)
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}};
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