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Matt Horsnell 77853b9f52 O3: Fix itstate prediction and recovery.
Any change of control flow now resets the itstate to 0 mask and 0 condition,
except where the control flow alteration write into the cpsr register. These
case, for example return from an iterrupt, require the predecoder to recover
the itstate.

As there is a window of opportunity between the return from an interrupt
changing the control flow at the head of the pipe and the commit of the update
to the CPSR, the predecoder needs to be able to grab the ITstate early. This
is now handled by setting the forcedItState inside a PCstate for the control
flow altering instruction.

That instruction will have the correct mask/cond, but will not have a valid
itstate until advancePC is called (note this happens to advance the execution).
When the new PCstate is copy constructed it gets the itstate cond/mask, and
upon advancing the PC the itstate becomes valid.

Subsequent advancing invalidates the state and zeroes the cond/mask. This is
handled in isolation for the ARM ISA and should have no impact on other ISAs.

Refer arch/arm/types.hh and arch/arm/predecoder.cc for the details.
2011-01-18 16:30:05 -06:00
build_opts SCons: Support building without an ISA 2010-11-19 18:00:39 -06:00
configs ruby: get rid of ruby's Debug.hh 2011-01-10 11:11:20 -08:00
ext scons: Work around for old versions of scons mistaking strings for sequences. 2010-11-09 11:03:40 -08:00
src O3: Fix itstate prediction and recovery. 2011-01-18 16:30:05 -06:00
system/arm/simple_bootloader ARM: Add code for a simple bootloader for MP boot. 2011-01-18 16:29:59 -06:00
tests SPARC: Update stats for the call r15 as source change. 2011-01-15 15:30:34 -08:00
util mkblankimage: bash != sh on many systems and this script needs bash 2011-01-18 16:30:00 -06:00
.hgignore .hgignore: added src/doxygen 2010-07-27 20:00:38 -07:00
.hgtags Added tag Calvin_Submission for changeset 5de565c4b7bd 2009-11-18 11:55:42 -06:00
AUTHORS RELEASE: More changes to text 2007-11-01 21:07:49 -04:00
LICENSE Update copyright dates 2008-02-11 12:35:28 -05:00
README Update the README and RELEASE_NOTES files to prepare for beta 6. 2008-10-07 00:53:25 -04:00
RELEASE_NOTES Update the README and RELEASE_NOTES files to prepare for beta 6. 2008-10-07 00:53:25 -04:00
SConstruct time: improve time datastructure 2011-01-15 07:48:25 -08:00

This is release 2.0_beta6 of the M5 simulator.

For detailed information about building the simulator and getting
started please refer to http://www.m5sim.org.

Specific pages of interest are:
http://www.m5sim.org/wiki/index.php/Compiling_M5
http://www.m5sim.org/wiki/index.php/Running_M5

Short version:

1. If you don't have SCons version 0.96.91 or newer, get it from
http://wwww.scons.org.

2. If you don't have SWIG version 1.3.28 or newer, get it from
http://wwww.swig.org.

3. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'.  This
will build the debug version of the m5 binary (m5.debug) for the Alpha
syscall emulation target, and run the quick regression tests on it.

If you have questions, please send mail to m5-users@m5sim.org

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5: 
   - src: source code of the m5 simulator
   - tests: regression tests
   - ext: less-common external packages needed to build m5

To run full-system simulations, you will need compiled console,
PALcode, and kernel binaries and one or more disk images.  These files
are collected in a separate archive, m5_system.tar.bz2.  This file
can he downloaded separately.

M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP
Tru64 version of Unix. We are able to distribute Linux and FreeBSD
bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-users@m5sim.org