1bb293d1e7
Convert condition code registers from being specialized
("pseudo") integer registers to using the recently
added CC register class.
Nilay Vaish also contributed to this patch.
115 lines
4.3 KiB
C++
115 lines
4.3 KiB
C++
/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* Copyright (c) 2013 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_X86_REGISTERS_HH__
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#define __ARCH_X86_REGISTERS_HH__
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#include "arch/x86/generated/max_inst_regs.hh"
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#include "arch/x86/regs/int.hh"
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#include "arch/x86/regs/ccr.hh"
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#include "arch/x86/regs/misc.hh"
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#include "arch/x86/x86_traits.hh"
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namespace X86ISA
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{
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using X86ISAInst::MaxInstSrcRegs;
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using X86ISAInst::MaxInstDestRegs;
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using X86ISAInst::MaxMiscDestRegs;
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const int NumMiscRegs = NUM_MISCREGS;
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const int NumIntArchRegs = NUM_INTREGS;
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const int NumIntRegs = NumIntArchRegs + NumMicroIntRegs + NumImplicitIntRegs;
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const int NumCCRegs = NUM_CCREGS;
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#define ISA_HAS_CC_REGS
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// Each 128 bit xmm register is broken into two effective 64 bit registers.
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// Add 8 for the indices that are mapped over the fp stack
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const int NumFloatRegs =
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NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8;
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// These enumerate all the registers for dependence tracking.
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enum DependenceTags {
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// FP_Reg_Base must be large enough to be bigger than any integer
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// register index which has the IntFoldBit (1 << 6) set. To be safe
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// we just start at (1 << 7) == 128.
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FP_Reg_Base = 128,
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CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
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Misc_Reg_Base = CC_Reg_Base + NumCCRegs,
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Max_Reg_Index = Misc_Reg_Base + NumMiscRegs
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};
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// semantically meaningful register indices
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//There is no such register in X86
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const int ZeroReg = NUM_INTREGS;
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const int StackPointerReg = INTREG_RSP;
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//X86 doesn't seem to have a link register
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const int ReturnAddressReg = 0;
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const int ReturnValueReg = INTREG_RAX;
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const int FramePointerReg = INTREG_RBP;
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// Some OS syscalls use a second register (rdx) to return a second
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// value
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const int SyscallPseudoReturnReg = INTREG_RDX;
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typedef uint64_t IntReg;
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typedef uint64_t CCReg;
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//XXX Should this be a 128 bit structure for XMM memory ops?
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typedef uint64_t LargestRead;
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typedef uint64_t MiscReg;
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//These floating point types are correct for mmx, but not
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//technically for x87 (80 bits) or at all for xmm (128 bits)
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typedef double FloatReg;
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typedef uint64_t FloatRegBits;
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typedef union
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{
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IntReg intReg;
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FloatReg fpReg;
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CCReg ccReg;
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MiscReg ctrlReg;
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} AnyReg;
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typedef uint16_t RegIndex;
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} // namespace X86ISA
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#endif // __ARCH_X86_REGFILE_HH__
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