1031b824b9
This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
661 lines
20 KiB
C++
661 lines
20 KiB
C++
/*
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* Copyright (c) 2010-2011 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2001-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ron Dreslinski
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* Ali Saidi
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*/
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#include <sys/mman.h>
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#include <sys/types.h>
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#include <sys/user.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <zlib.h>
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#include <cerrno>
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#include <cstdio>
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#include <iostream>
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#include <string>
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#include "arch/isa_traits.hh"
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#include "arch/registers.hh"
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#include "base/intmath.hh"
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#include "base/misc.hh"
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#include "base/random.hh"
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#include "base/types.hh"
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#include "config/the_isa.hh"
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#include "debug/LLSC.hh"
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#include "debug/MemoryAccess.hh"
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#include "mem/packet_access.hh"
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#include "mem/physical.hh"
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#include "sim/eventq.hh"
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using namespace std;
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using namespace TheISA;
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PhysicalMemory::PhysicalMemory(const Params *p)
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: MemObject(p), pmemAddr(NULL), lat(p->latency), lat_var(p->latency_var),
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_size(params()->range.size()), _start(params()->range.start)
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{
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if (size() % TheISA::PageBytes != 0)
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panic("Memory Size not divisible by page size\n");
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// create the appropriate number of ports
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for (int i = 0; i < p->port_port_connection_count; ++i) {
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ports.push_back(new MemoryPort(csprintf("%s-port%d", name(), i),
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this));
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}
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if (params()->null)
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return;
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if (params()->file == "") {
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int map_flags = MAP_ANON | MAP_PRIVATE;
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pmemAddr = (uint8_t *)mmap(NULL, size(),
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PROT_READ | PROT_WRITE, map_flags, -1, 0);
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} else {
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int map_flags = MAP_PRIVATE;
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int fd = open(params()->file.c_str(), O_RDONLY);
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_size = lseek(fd, 0, SEEK_END);
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lseek(fd, 0, SEEK_SET);
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pmemAddr = (uint8_t *)mmap(NULL, roundUp(size(), sysconf(_SC_PAGESIZE)),
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PROT_READ | PROT_WRITE, map_flags, fd, 0);
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}
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if (pmemAddr == (void *)MAP_FAILED) {
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perror("mmap");
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if (params()->file == "")
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fatal("Could not mmap!\n");
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else
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fatal("Could not find file: %s\n", params()->file);
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}
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//If requested, initialize all the memory to 0
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if (p->zero)
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memset(pmemAddr, 0, size());
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}
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void
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PhysicalMemory::init()
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{
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if (ports.empty()) {
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fatal("PhysicalMemory object %s is unconnected!", name());
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}
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for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
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(*pi)->sendRangeChange();
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}
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}
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PhysicalMemory::~PhysicalMemory()
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{
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if (pmemAddr)
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munmap((char*)pmemAddr, size());
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}
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void
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PhysicalMemory::regStats()
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{
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using namespace Stats;
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bytesRead
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.name(name() + ".bytes_read")
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.desc("Number of bytes read from this memory")
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;
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bytesInstRead
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.name(name() + ".bytes_inst_read")
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.desc("Number of instructions bytes read from this memory")
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;
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bytesWritten
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.name(name() + ".bytes_written")
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.desc("Number of bytes written to this memory")
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;
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numReads
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.name(name() + ".num_reads")
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.desc("Number of read requests responded to by this memory")
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;
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numWrites
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.name(name() + ".num_writes")
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.desc("Number of write requests responded to by this memory")
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;
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numOther
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.name(name() + ".num_other")
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.desc("Number of other requests responded to by this memory")
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;
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bwRead
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.name(name() + ".bw_read")
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.desc("Total read bandwidth from this memory (bytes/s)")
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.precision(0)
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.prereq(bytesRead)
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;
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bwInstRead
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.name(name() + ".bw_inst_read")
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.desc("Instruction read bandwidth from this memory (bytes/s)")
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.precision(0)
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.prereq(bytesInstRead)
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;
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bwWrite
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.name(name() + ".bw_write")
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.desc("Write bandwidth from this memory (bytes/s)")
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.precision(0)
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.prereq(bytesWritten)
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;
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bwTotal
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.name(name() + ".bw_total")
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.desc("Total bandwidth to/from this memory (bytes/s)")
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.precision(0)
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.prereq(bwTotal)
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;
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bwRead = bytesRead / simSeconds;
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bwInstRead = bytesInstRead / simSeconds;
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bwWrite = bytesWritten / simSeconds;
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bwTotal = (bytesRead + bytesWritten) / simSeconds;
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}
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unsigned
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PhysicalMemory::deviceBlockSize() const
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{
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//Can accept anysize request
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return 0;
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}
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Tick
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PhysicalMemory::calculateLatency(PacketPtr pkt)
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{
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Tick latency = lat;
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if (lat_var != 0)
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latency += random_mt.random<Tick>(0, lat_var);
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return latency;
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}
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// Add load-locked to tracking list. Should only be called if the
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// operation is a load and the LLSC flag is set.
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void
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PhysicalMemory::trackLoadLocked(PacketPtr pkt)
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{
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Request *req = pkt->req;
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Addr paddr = LockedAddr::mask(req->getPaddr());
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// first we check if we already have a locked addr for this
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// xc. Since each xc only gets one, we just update the
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// existing record with the new address.
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list<LockedAddr>::iterator i;
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for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) {
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if (i->matchesContext(req)) {
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DPRINTF(LLSC, "Modifying lock record: context %d addr %#x\n",
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req->contextId(), paddr);
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i->addr = paddr;
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return;
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}
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}
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// no record for this xc: need to allocate a new one
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DPRINTF(LLSC, "Adding lock record: context %d addr %#x\n",
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req->contextId(), paddr);
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lockedAddrList.push_front(LockedAddr(req));
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}
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// Called on *writes* only... both regular stores and
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// store-conditional operations. Check for conventional stores which
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// conflict with locked addresses, and for success/failure of store
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// conditionals.
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bool
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PhysicalMemory::checkLockedAddrList(PacketPtr pkt)
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{
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Request *req = pkt->req;
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Addr paddr = LockedAddr::mask(req->getPaddr());
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bool isLLSC = pkt->isLLSC();
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// Initialize return value. Non-conditional stores always
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// succeed. Assume conditional stores will fail until proven
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// otherwise.
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bool success = !isLLSC;
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// Iterate over list. Note that there could be multiple matching
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// records, as more than one context could have done a load locked
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// to this location.
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list<LockedAddr>::iterator i = lockedAddrList.begin();
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while (i != lockedAddrList.end()) {
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if (i->addr == paddr) {
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// we have a matching address
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if (isLLSC && i->matchesContext(req)) {
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// it's a store conditional, and as far as the memory
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// system can tell, the requesting context's lock is
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// still valid.
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DPRINTF(LLSC, "StCond success: context %d addr %#x\n",
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req->contextId(), paddr);
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success = true;
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}
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// Get rid of our record of this lock and advance to next
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DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
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i->contextId, paddr);
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i = lockedAddrList.erase(i);
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}
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else {
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// no match: advance to next record
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++i;
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}
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}
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if (isLLSC) {
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req->setExtraData(success ? 1 : 0);
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}
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return success;
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}
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#if TRACING_ON
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#define CASE(A, T) \
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case sizeof(T): \
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DPRINTF(MemoryAccess,"%s of size %i on address 0x%x data 0x%x\n", \
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A, pkt->getSize(), pkt->getAddr(), pkt->get<T>()); \
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break
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#define TRACE_PACKET(A) \
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do { \
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switch (pkt->getSize()) { \
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CASE(A, uint64_t); \
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CASE(A, uint32_t); \
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CASE(A, uint16_t); \
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CASE(A, uint8_t); \
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default: \
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DPRINTF(MemoryAccess, "%s of size %i on address 0x%x\n", \
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A, pkt->getSize(), pkt->getAddr()); \
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DDUMP(MemoryAccess, pkt->getPtr<uint8_t>(), pkt->getSize());\
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} \
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} while (0)
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#else
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#define TRACE_PACKET(A)
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#endif
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Tick
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PhysicalMemory::doAtomicAccess(PacketPtr pkt)
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{
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assert(pkt->getAddr() >= start() &&
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pkt->getAddr() + pkt->getSize() <= start() + size());
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if (pkt->memInhibitAsserted()) {
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DPRINTF(MemoryAccess, "mem inhibited on 0x%x: not responding\n",
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pkt->getAddr());
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return 0;
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}
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uint8_t *hostAddr = pmemAddr + pkt->getAddr() - start();
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if (pkt->cmd == MemCmd::SwapReq) {
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IntReg overwrite_val;
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bool overwrite_mem;
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uint64_t condition_val64;
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uint32_t condition_val32;
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if (!pmemAddr)
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panic("Swap only works if there is real memory (i.e. null=False)");
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assert(sizeof(IntReg) >= pkt->getSize());
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overwrite_mem = true;
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// keep a copy of our possible write value, and copy what is at the
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// memory address into the packet
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std::memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize());
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std::memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
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if (pkt->req->isCondSwap()) {
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if (pkt->getSize() == sizeof(uint64_t)) {
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condition_val64 = pkt->req->getExtraData();
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overwrite_mem = !std::memcmp(&condition_val64, hostAddr,
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sizeof(uint64_t));
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} else if (pkt->getSize() == sizeof(uint32_t)) {
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condition_val32 = (uint32_t)pkt->req->getExtraData();
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overwrite_mem = !std::memcmp(&condition_val32, hostAddr,
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sizeof(uint32_t));
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} else
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panic("Invalid size for conditional read/write\n");
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}
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if (overwrite_mem)
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std::memcpy(hostAddr, &overwrite_val, pkt->getSize());
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assert(!pkt->req->isInstFetch());
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TRACE_PACKET("Read/Write");
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numOther++;
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} else if (pkt->isRead()) {
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assert(!pkt->isWrite());
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if (pkt->isLLSC()) {
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trackLoadLocked(pkt);
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}
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if (pmemAddr)
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memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
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TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
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numReads++;
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bytesRead += pkt->getSize();
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if (pkt->req->isInstFetch())
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bytesInstRead += pkt->getSize();
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} else if (pkt->isWrite()) {
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if (writeOK(pkt)) {
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if (pmemAddr)
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memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
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assert(!pkt->req->isInstFetch());
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TRACE_PACKET("Write");
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numWrites++;
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bytesWritten += pkt->getSize();
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}
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} else if (pkt->isInvalidate()) {
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//upgrade or invalidate
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if (pkt->needsResponse()) {
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pkt->makeAtomicResponse();
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}
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} else {
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panic("unimplemented");
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}
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if (pkt->needsResponse()) {
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pkt->makeAtomicResponse();
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}
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return calculateLatency(pkt);
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}
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void
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PhysicalMemory::doFunctionalAccess(PacketPtr pkt)
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{
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assert(pkt->getAddr() >= start() &&
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pkt->getAddr() + pkt->getSize() <= start() + size());
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uint8_t *hostAddr = pmemAddr + pkt->getAddr() - start();
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if (pkt->isRead()) {
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if (pmemAddr)
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memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
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TRACE_PACKET("Read");
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pkt->makeAtomicResponse();
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} else if (pkt->isWrite()) {
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if (pmemAddr)
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memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
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TRACE_PACKET("Write");
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pkt->makeAtomicResponse();
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} else if (pkt->isPrint()) {
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Packet::PrintReqState *prs =
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dynamic_cast<Packet::PrintReqState*>(pkt->senderState);
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// Need to call printLabels() explicitly since we're not going
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// through printObj().
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prs->printLabels();
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// Right now we just print the single byte at the specified address.
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ccprintf(prs->os, "%s%#x\n", prs->curPrefix(), *hostAddr);
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} else {
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panic("PhysicalMemory: unimplemented functional command %s",
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pkt->cmdString());
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}
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}
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Port *
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PhysicalMemory::getPort(const std::string &if_name, int idx)
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{
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if (if_name != "port") {
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panic("PhysicalMemory::getPort: unknown port %s requested\n", if_name);
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}
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if (idx >= static_cast<int>(ports.size())) {
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panic("PhysicalMemory::getPort: unknown index %d requested\n", idx);
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}
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return ports[idx];
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}
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PhysicalMemory::MemoryPort::MemoryPort(const std::string &_name,
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PhysicalMemory *_memory)
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: SimpleTimingPort(_name, _memory), memory(_memory)
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{ }
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void
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PhysicalMemory::MemoryPort::recvRangeChange()
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{
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// memory is a slave and thus should never have to worry about its
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// neighbours address ranges
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}
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AddrRangeList
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PhysicalMemory::MemoryPort::getAddrRanges()
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{
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return memory->getAddrRanges();
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}
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AddrRangeList
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PhysicalMemory::getAddrRanges()
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{
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AddrRangeList ranges;
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ranges.push_back(RangeSize(start(), size()));
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return ranges;
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}
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unsigned
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PhysicalMemory::MemoryPort::deviceBlockSize() const
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{
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return memory->deviceBlockSize();
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}
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Tick
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PhysicalMemory::MemoryPort::recvAtomic(PacketPtr pkt)
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{
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return memory->doAtomicAccess(pkt);
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}
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void
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PhysicalMemory::MemoryPort::recvFunctional(PacketPtr pkt)
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{
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pkt->pushLabel(memory->name());
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if (!checkFunctional(pkt)) {
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// Default implementation of SimpleTimingPort::recvFunctional()
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// calls recvAtomic() and throws away the latency; we can save a
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// little here by just not calculating the latency.
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memory->doFunctionalAccess(pkt);
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}
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pkt->popLabel();
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}
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unsigned int
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PhysicalMemory::drain(Event *de)
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{
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int count = 0;
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for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
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count += (*pi)->drain(de);
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}
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if (count)
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changeState(Draining);
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else
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changeState(Drained);
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return count;
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}
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void
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PhysicalMemory::serialize(ostream &os)
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{
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if (!pmemAddr)
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return;
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|
|
gzFile compressedMem;
|
|
string filename = name() + ".physmem";
|
|
|
|
SERIALIZE_SCALAR(filename);
|
|
SERIALIZE_SCALAR(_size);
|
|
|
|
// write memory file
|
|
string thefile = Checkpoint::dir() + "/" + filename.c_str();
|
|
int fd = creat(thefile.c_str(), 0664);
|
|
if (fd < 0) {
|
|
perror("creat");
|
|
fatal("Can't open physical memory checkpoint file '%s'\n", filename);
|
|
}
|
|
|
|
compressedMem = gzdopen(fd, "wb");
|
|
if (compressedMem == NULL)
|
|
fatal("Insufficient memory to allocate compression state for %s\n",
|
|
filename);
|
|
|
|
if (gzwrite(compressedMem, pmemAddr, size()) != (int)size()) {
|
|
fatal("Write failed on physical memory checkpoint file '%s'\n",
|
|
filename);
|
|
}
|
|
|
|
if (gzclose(compressedMem))
|
|
fatal("Close failed on physical memory checkpoint file '%s'\n",
|
|
filename);
|
|
|
|
list<LockedAddr>::iterator i = lockedAddrList.begin();
|
|
|
|
vector<Addr> lal_addr;
|
|
vector<int> lal_cid;
|
|
while (i != lockedAddrList.end()) {
|
|
lal_addr.push_back(i->addr);
|
|
lal_cid.push_back(i->contextId);
|
|
i++;
|
|
}
|
|
arrayParamOut(os, "lal_addr", lal_addr);
|
|
arrayParamOut(os, "lal_cid", lal_cid);
|
|
}
|
|
|
|
void
|
|
PhysicalMemory::unserialize(Checkpoint *cp, const string §ion)
|
|
{
|
|
if (!pmemAddr)
|
|
return;
|
|
|
|
gzFile compressedMem;
|
|
long *tempPage;
|
|
long *pmem_current;
|
|
uint64_t curSize;
|
|
uint32_t bytesRead;
|
|
const uint32_t chunkSize = 16384;
|
|
|
|
string filename;
|
|
|
|
UNSERIALIZE_SCALAR(filename);
|
|
|
|
filename = cp->cptDir + "/" + filename;
|
|
|
|
// mmap memoryfile
|
|
int fd = open(filename.c_str(), O_RDONLY);
|
|
if (fd < 0) {
|
|
perror("open");
|
|
fatal("Can't open physical memory checkpoint file '%s'", filename);
|
|
}
|
|
|
|
compressedMem = gzdopen(fd, "rb");
|
|
if (compressedMem == NULL)
|
|
fatal("Insufficient memory to allocate compression state for %s\n",
|
|
filename);
|
|
|
|
// unmap file that was mmapped in the constructor
|
|
// This is done here to make sure that gzip and open don't muck with our
|
|
// nice large space of memory before we reallocate it
|
|
munmap((char*)pmemAddr, size());
|
|
|
|
UNSERIALIZE_SCALAR(_size);
|
|
if (size() > params()->range.size())
|
|
fatal("Memory size has changed! size %lld, param size %lld\n",
|
|
size(), params()->range.size());
|
|
|
|
pmemAddr = (uint8_t *)mmap(NULL, size(),
|
|
PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
|
|
|
|
if (pmemAddr == (void *)MAP_FAILED) {
|
|
perror("mmap");
|
|
fatal("Could not mmap physical memory!\n");
|
|
}
|
|
|
|
curSize = 0;
|
|
tempPage = (long*)malloc(chunkSize);
|
|
if (tempPage == NULL)
|
|
fatal("Unable to malloc memory to read file %s\n", filename);
|
|
|
|
/* Only copy bytes that are non-zero, so we don't give the VM system hell */
|
|
while (curSize < size()) {
|
|
bytesRead = gzread(compressedMem, tempPage, chunkSize);
|
|
if (bytesRead == 0)
|
|
break;
|
|
|
|
assert(bytesRead % sizeof(long) == 0);
|
|
|
|
for (uint32_t x = 0; x < bytesRead / sizeof(long); x++)
|
|
{
|
|
if (*(tempPage+x) != 0) {
|
|
pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long));
|
|
*pmem_current = *(tempPage+x);
|
|
}
|
|
}
|
|
curSize += bytesRead;
|
|
}
|
|
|
|
free(tempPage);
|
|
|
|
if (gzclose(compressedMem))
|
|
fatal("Close failed on physical memory checkpoint file '%s'\n",
|
|
filename);
|
|
|
|
vector<Addr> lal_addr;
|
|
vector<int> lal_cid;
|
|
arrayParamIn(cp, section, "lal_addr", lal_addr);
|
|
arrayParamIn(cp, section, "lal_cid", lal_cid);
|
|
for(int i = 0; i < lal_addr.size(); i++)
|
|
lockedAddrList.push_front(LockedAddr(lal_addr[i], lal_cid[i]));
|
|
}
|
|
|
|
PhysicalMemory *
|
|
PhysicalMemoryParams::create()
|
|
{
|
|
return new PhysicalMemory(this);
|
|
}
|