de29fec658
Add explicit include of sim/param.hh to .cc files as needed.
cpu/base_cpu.cc:
cpu/exetrace.cc:
dev/etherint.cc:
sim/system.cc:
Add include of sim/param.hh.
sim/sim_object.hh:
Don't need to include sim/param.hh.
--HG--
extra : convert_revision : 8ed13f25c2087680230056ab7abb623e6a7699cf
91 lines
2.7 KiB
C++
91 lines
2.7 KiB
C++
/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "cpu/exec_context.hh"
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#include "targetarch/vtophys.hh"
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#include "sim/param.hh"
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#include "sim/system.hh"
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using namespace std;
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vector<System *> System::systemList;
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int System::numSystemsRunning = 0;
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System::System(const std::string _name,
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const int _init_param,
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MemoryController *_memCtrl,
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PhysicalMemory *_physmem)
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: SimObject(_name),
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init_param(_init_param),
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memCtrl(_memCtrl),
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physmem(_physmem)
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{
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// add self to global system list
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systemList.push_back(this);
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}
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System::~System()
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{
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}
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void
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System::registerExecContext(ExecContext *xc)
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{
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if (xc->cpu_id >= 12/*MAX_CPUS*/)
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panic("Too many CPU's\n");
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if (xc->cpu_id >= xcvec.size())
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xcvec.resize(xc->cpu_id + 1);
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xcvec[xc->cpu_id] = xc;
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}
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void
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System::printSystems()
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{
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vector<System *>::iterator i = systemList.begin();
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vector<System *>::iterator end = systemList.end();
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for (; i != end; ++i) {
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System *sys = *i;
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cerr << "System " << sys->name() << ": " << hex << sys << endl;
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}
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}
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extern "C"
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void
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printSystems()
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{
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System::printSystems();
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}
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DEFINE_SIM_OBJECT_CLASS_NAME("System", System)
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