gem5/src
Joel Hestness 1f2e7c1aaa sim: Don't quiesce UDelayEvents with 0 latency
ARM uses UDelayEvents to emulate kernel __*udelay functions and speed up
simulation. UDelayEvents call Pseudoinst::quiesceNs to quiesce the system for
a specified delay. Changeset 10341:0b4d10f53c2d introduced the requirement
that any quiesce process that is started must also be completed by scheduling
an EndQuiesceEvent. This change causes the CPU to hang if an IsQuiesce
instruction is executed, but the corresponding EndQuiesceEvent is not
scheduled.

Changeset 11058:d0934b57735a introduces a fix for uses of PseudoInst::quiesce*
that would conditionally execute the EndQuiesceEvent. ARM UDelayEvents specify
quiesce period of 0 ns (src/arch/arm/linux/system.cc), so changeset 11058
causes these events to now execute full quiesce processes, greatly increasing
the total instructions executed in kernel delay loops and slowing simulation.

This patch updates the UDelayEvent to conditionally execute
PseudoInst::quiesceNs (**a quiesce operation**) only if the specified
delay is >0 ns. The result is ARM delay loops no longer execute instructions
for quiesce handling, and regression time returns to normal.
2015-10-10 16:45:38 -05:00
..
arch isa: Add parameter to pick different decoder inside ISA 2015-10-09 14:50:54 -05:00
base base: remove Trace::enabled flag 2015-09-30 15:21:55 -05:00
cpu isa: Add parameter to pick different decoder inside ISA 2015-10-09 14:50:54 -05:00
dev isa,cpu: Add support for FS SMT Interrupts 2015-09-30 11:14:19 -05:00
doc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
doxygen MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
kern sim: Don't quiesce UDelayEvents with 0 latency 2015-10-10 16:45:38 -05:00
mem cpu,isa,mem: Add per-thread wakeup logic 2015-09-30 11:14:19 -05:00
proto cpu: add support for outputing a protobuf formatted CPU trace 2015-02-16 03:32:38 -05:00
python sim: print pid in output header 2015-10-06 17:26:50 -07:00
sim sim: Add relative break scheduling 2015-10-09 14:27:09 -05:00
unittest base: Rewrite the CircleBuf to fix bugs and add serialization 2015-08-07 09:59:19 +01:00
Doxyfile Doxygen: Update the version of the Doxyfile 2012-10-11 06:38:42 -04:00
SConscript sim: tag-based checkpoint versioning 2015-09-02 15:23:30 -05:00