ad8b9636f8
Update copyright dates and author list SConscript: arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_linux_process.hh: arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: arch/alpha/alpha_tru64_process.cc: arch/alpha/alpha_tru64_process.hh: arch/alpha/aout_machdep.h: arch/alpha/arguments.cc: arch/alpha/arguments.hh: arch/alpha/ev5.cc: arch/alpha/ev5.hh: arch/alpha/faults.cc: arch/alpha/faults.hh: arch/alpha/isa_desc: arch/alpha/isa_traits.hh: arch/alpha/osfpal.cc: arch/alpha/osfpal.hh: arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: arch/alpha/vptr.hh: arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: base/bitfield.hh: base/callback.hh: base/circlebuf.cc: base/circlebuf.hh: base/cprintf.cc: base/cprintf.hh: base/cprintf_formats.hh: base/crc.hh: base/date.cc: base/dbl_list.hh: base/endian.hh: base/fast_alloc.cc: base/fast_alloc.hh: base/fifo_buffer.cc: base/fifo_buffer.hh: base/hashmap.hh: base/hostinfo.cc: base/hostinfo.hh: base/hybrid_pred.cc: base/hybrid_pred.hh: base/inet.cc: base/inet.hh: base/inifile.cc: base/inifile.hh: base/intmath.cc: base/intmath.hh: base/match.cc: base/match.hh: base/misc.cc: base/misc.hh: base/mod_num.hh: base/mysql.cc: base/mysql.hh: base/output.cc: base/output.hh: base/pollevent.cc: base/pollevent.hh: base/predictor.hh: base/random.cc: base/random.hh: base/range.cc: base/range.hh: base/refcnt.hh: base/remote_gdb.cc: base/remote_gdb.hh: base/res_list.hh: base/sat_counter.cc: base/sat_counter.hh: base/sched_list.hh: base/socket.cc: base/socket.hh: base/statistics.cc: base/statistics.hh: base/compression/lzss_compression.cc: base/compression/lzss_compression.hh: base/compression/null_compression.hh: base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/object_file.cc: base/loader/object_file.hh: base/loader/symtab.cc: base/loader/symtab.hh: base/stats/events.cc: base/stats/events.hh: base/stats/flags.hh: base/stats/mysql.cc: base/stats/mysql.hh: base/stats/mysql_run.hh: base/stats/output.hh: base/stats/statdb.cc: base/stats/statdb.hh: base/stats/text.cc: base/stats/text.hh: base/stats/types.hh: base/stats/visit.cc: base/stats/visit.hh: base/str.cc: base/str.hh: base/time.cc: base/time.hh: base/timebuf.hh: base/trace.cc: base/trace.hh: base/userinfo.cc: base/userinfo.hh: build/SConstruct: cpu/base.cc: cpu/base.hh: cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/exetrace.cc: cpu/exetrace.hh: cpu/inst_seq.hh: cpu/intr_control.cc: cpu/intr_control.hh: cpu/memtest/memtest.cc: cpu/pc_event.cc: cpu/pc_event.hh: cpu/smt.hh: cpu/static_inst.cc: cpu/static_inst.hh: cpu/memtest/memtest.hh: cpu/o3/sat_counter.cc: cpu/o3/sat_counter.hh: cpu/ozone/cpu.hh: cpu/simple/cpu.cc: cpu/simple/cpu.hh: cpu/trace/opt_cpu.cc: cpu/trace/opt_cpu.hh: cpu/trace/reader/ibm_reader.cc: cpu/trace/reader/ibm_reader.hh: cpu/trace/reader/itx_reader.cc: cpu/trace/reader/itx_reader.hh: cpu/trace/reader/m5_reader.cc: cpu/trace/reader/m5_reader.hh: cpu/trace/reader/mem_trace_reader.cc: cpu/trace/reader/mem_trace_reader.hh: cpu/trace/trace_cpu.cc: cpu/trace/trace_cpu.hh: dev/alpha_access.h: dev/alpha_console.cc: dev/alpha_console.hh: dev/baddev.cc: dev/baddev.hh: dev/disk_image.cc: dev/disk_image.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.cc: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.cc: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/io_device.cc: dev/io_device.hh: dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/pcireg.h: dev/pktfifo.cc: dev/pktfifo.hh: dev/platform.cc: dev/platform.hh: dev/simconsole.cc: dev/simconsole.hh: dev/simple_disk.cc: dev/simple_disk.hh: dev/sinic.cc: dev/sinic.hh: dev/sinicreg.hh: dev/tsunami.cc: dev/tsunami.hh: dev/tsunami_cchip.cc: dev/tsunami_cchip.hh: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: dev/tsunamireg.h: dev/uart.cc: dev/uart.hh: dev/uart8250.cc: dev/uart8250.hh: docs/stl.hh: encumbered/cpu/full/op_class.hh: kern/kernel_stats.cc: kern/kernel_stats.hh: kern/linux/linux.hh: kern/linux/linux_syscalls.cc: kern/linux/linux_syscalls.hh: kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/linux/linux_threadinfo.hh: kern/linux/printk.cc: kern/linux/printk.hh: kern/system_events.cc: kern/system_events.hh: kern/tru64/dump_mbuf.cc: kern/tru64/dump_mbuf.hh: kern/tru64/mbuf.hh: kern/tru64/printf.cc: kern/tru64/printf.hh: kern/tru64/tru64.hh: kern/tru64/tru64_events.cc: kern/tru64/tru64_events.hh: kern/tru64/tru64_syscalls.cc: kern/tru64/tru64_syscalls.hh: kern/tru64/tru64_system.cc: kern/tru64/tru64_system.hh: python/SConscript: python/m5/__init__.py: python/m5/config.py: python/m5/convert.py: python/m5/multidict.py: python/m5/smartdict.py: sim/async.hh: sim/builder.cc: sim/builder.hh: sim/debug.cc: sim/debug.hh: sim/eventq.cc: sim/eventq.hh: sim/host.hh: sim/main.cc: sim/param.cc: sim/param.hh: sim/process.cc: sim/process.hh: sim/root.cc: sim/serialize.cc: sim/serialize.hh: sim/sim_events.cc: sim/sim_events.hh: sim/sim_exit.hh: sim/sim_object.cc: sim/sim_object.hh: sim/startup.cc: sim/startup.hh: sim/stat_control.cc: sim/stat_control.hh: sim/stats.hh: sim/syscall_emul.cc: sim/syscall_emul.hh: sim/system.cc: sim/system.hh: test/bitvectest.cc: test/circletest.cc: test/cprintftest.cc: test/genini.py: test/initest.cc: test/lru_test.cc: test/nmtest.cc: test/offtest.cc: test/paramtest.cc: test/rangetest.cc: test/sized_test.cc: test/stattest.cc: test/strnumtest.cc: test/symtest.cc: test/tokentest.cc: test/tracetest.cc: util/ccdrv/devtime.c: util/m5/m5.c: util/oprofile-top.py: util/rundiff: util/m5/m5op.h: util/m5/m5op.s: util/stats/db.py: util/stats/dbinit.py: util/stats/display.py: util/stats/info.py: util/stats/print.py: util/stats/stats.py: util/tap/tap.cc: Update copyright dates and author list --HG-- extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
429 lines
12 KiB
C++
429 lines
12 KiB
C++
/*
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* Copyright (c) 2000-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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///
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/// @file sim/main.cc
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///
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <errno.h>
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#include <libgen.h>
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#include <stdlib.h>
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#include <signal.h>
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#include <list>
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#include <string>
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#include <vector>
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#include "base/copyright.hh"
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#include "base/embedfile.hh"
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#include "base/inifile.hh"
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#include "base/misc.hh"
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#include "base/output.hh"
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#include "base/pollevent.hh"
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#include "base/statistics.hh"
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#include "base/str.hh"
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#include "base/time.hh"
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#include "cpu/base.hh"
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#include "cpu/smt.hh"
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#include "python/pyconfig.hh"
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#include "sim/async.hh"
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#include "sim/builder.hh"
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#include "sim/configfile.hh"
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#include "sim/host.hh"
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#include "sim/sim_events.hh"
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#include "sim/sim_exit.hh"
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#include "sim/sim_object.hh"
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#include "sim/stat_control.hh"
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#include "sim/stats.hh"
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#include "sim/root.hh"
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using namespace std;
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// See async.h.
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volatile bool async_event = false;
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volatile bool async_dump = false;
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volatile bool async_dumpreset = false;
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volatile bool async_exit = false;
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volatile bool async_io = false;
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volatile bool async_alarm = false;
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/// Stats signal handler.
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void
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dumpStatsHandler(int sigtype)
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{
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async_event = true;
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async_dump = true;
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}
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void
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dumprstStatsHandler(int sigtype)
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{
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async_event = true;
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async_dumpreset = true;
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}
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/// Exit signal handler.
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void
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exitNowHandler(int sigtype)
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{
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async_event = true;
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async_exit = true;
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}
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/// Abort signal handler.
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void
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abortHandler(int sigtype)
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{
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cerr << "Program aborted at cycle " << curTick << endl;
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#if TRACING_ON
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// dump trace buffer, if there is one
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Trace::theLog.dump(cerr);
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#endif
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}
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/// Simulator executable name
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char *myProgName = "";
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/// Show brief help message.
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void
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showBriefHelp(ostream &out)
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{
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char *prog = basename(myProgName);
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ccprintf(out, "Usage:\n");
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ccprintf(out,
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"%s [-d <dir>] [-E <var>[=<val>]] [-I <dir>] [-P <python>]\n"
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" [--<var>=<val>] <config file>\n"
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"\n"
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" -d set the output directory to <dir>\n"
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" -E set the environment variable <var> to <val> (or 'True')\n"
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" -I add the directory <dir> to python's path\n"
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" -P execute <python> directly in the configuration\n"
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" --var=val set the python variable <var> to '<val>'\n"
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" <configfile> config file name (ends in .py)\n\n",
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prog);
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ccprintf(out, "%s -X\n -X extract embedded files\n\n", prog);
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ccprintf(out, "%s -h\n -h print short help\n\n", prog);
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}
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/// Print welcome message.
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void
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sayHello(ostream &out)
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{
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extern const char *compileDate; // from date.cc
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ccprintf(out, "M5 Simulator System\n");
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// display copyright
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ccprintf(out, "%s\n", briefCopyright);
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ccprintf(out, "M5 compiled on %d\n", compileDate);
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char *host = getenv("HOSTNAME");
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if (!host)
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host = getenv("HOST");
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if (host)
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ccprintf(out, "M5 executing on %s\n", host);
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ccprintf(out, "M5 simulation started %s\n", Time::start);
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}
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///
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/// Echo the command line for posterity in such a way that it can be
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/// used to rerun the same simulation (given the same .ini files).
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///
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void
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echoCommandLine(int argc, char **argv, ostream &out)
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{
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out << "command line: " << argv[0];
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for (int i = 1; i < argc; i++) {
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string arg(argv[i]);
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out << ' ';
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// If the arg contains spaces, we need to quote it.
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// The rest of this is overkill to make it look purty.
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// print dashes first outside quotes
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int non_dash_pos = arg.find_first_not_of("-");
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out << arg.substr(0, non_dash_pos); // print dashes
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string body = arg.substr(non_dash_pos); // the rest
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// if it's an assignment, handle the lhs & rhs separately
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int eq_pos = body.find("=");
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if (eq_pos == string::npos) {
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out << quote(body);
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}
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else {
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string lhs(body.substr(0, eq_pos));
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string rhs(body.substr(eq_pos + 1));
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out << quote(lhs) << "=" << quote(rhs);
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}
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}
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out << endl << endl;
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}
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char *
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getOptionString(int &index, int argc, char **argv)
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{
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char *option = argv[index] + 2;
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if (*option != '\0')
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return option;
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// We didn't find an argument, it must be in the next variable.
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if (++index >= argc)
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panic("option string for option '%s' not found", argv[index - 1]);
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return argv[index];
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}
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int
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main(int argc, char **argv)
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{
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// Save off program name
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myProgName = argv[0];
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signal(SIGFPE, SIG_IGN); // may occur on misspeculated paths
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signal(SIGTRAP, SIG_IGN);
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signal(SIGUSR1, dumpStatsHandler); // dump intermediate stats
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signal(SIGUSR2, dumprstStatsHandler); // dump and reset stats
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signal(SIGINT, exitNowHandler); // dump final stats and exit
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signal(SIGABRT, abortHandler);
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bool configfile_found = false;
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PythonConfig pyconfig;
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string outdir;
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if (argc < 2) {
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showBriefHelp(cerr);
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exit(1);
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}
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sayHello(cerr);
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// Parse command-line options.
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// Since most of the complex options are handled through the
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// config database, we don't mess with getopts, and just parse
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// manually.
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for (int i = 1; i < argc; ++i) {
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char *arg_str = argv[i];
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// if arg starts with '--', parse as a special python option
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// of the format --<python var>=<string value>, if the arg
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// starts with '-', it should be a simulator option with a
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// format similar to getopt. In any other case, treat the
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// option as a configuration file name and load it.
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if (arg_str[0] == '-' && arg_str[1] == '-') {
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string str = &arg_str[2];
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string var, val;
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if (!split_first(str, var, val, '='))
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panic("Could not parse configuration argument '%s'\n"
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"Expecting --<variable>=<value>\n", arg_str);
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pyconfig.setVariable(var, val);
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} else if (arg_str[0] == '-') {
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char *option;
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string var, val;
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// switch on second char
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switch (arg_str[1]) {
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case 'd':
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outdir = getOptionString(i, argc, argv);
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break;
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case 'h':
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showBriefHelp(cerr);
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exit(1);
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case 'E':
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option = getOptionString(i, argc, argv);
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if (!split_first(option, var, val, '='))
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val = "True";
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if (setenv(var.c_str(), val.c_str(), true) == -1)
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panic("setenv: %s\n", strerror(errno));
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break;
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case 'I':
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option = getOptionString(i, argc, argv);
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pyconfig.addPath(option);
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break;
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case 'P':
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option = getOptionString(i, argc, argv);
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pyconfig.writeLine(option);
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break;
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case 'X': {
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list<EmbedFile> lst;
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EmbedMap::all(lst);
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list<EmbedFile>::iterator i = lst.begin();
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list<EmbedFile>::iterator end = lst.end();
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while (i != end) {
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cprintf("Embedded File: %s\n", i->name);
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cout.write(i->data, i->length);
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++i;
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}
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return 0;
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}
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default:
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showBriefHelp(cerr);
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panic("invalid argument '%s'\n", arg_str);
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}
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} else {
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string file(arg_str);
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string base, ext;
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if (!split_last(file, base, ext, '.') || ext != "py")
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panic("Config file '%s' must end in '.py'\n", file);
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pyconfig.load(file);
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configfile_found = true;
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}
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}
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if (outdir.empty()) {
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char *env = getenv("OUTPUT_DIR");
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outdir = env ? env : ".";
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}
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simout.setDirectory(outdir);
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char *env = getenv("CONFIG_OUTPUT");
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if (!env)
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env = "config.out";
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configStream = simout.find(env);
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if (!configfile_found)
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panic("no configuration file specified!");
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// The configuration database is now complete; start processing it.
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IniFile inifile;
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if (!pyconfig.output(inifile))
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panic("Error processing python code");
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// Initialize statistics database
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Stats::InitSimStats();
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// Now process the configuration hierarchy and create the SimObjects.
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ConfigHierarchy configHierarchy(inifile);
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configHierarchy.build();
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configHierarchy.createSimObjects();
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// Parse and check all non-config-hierarchy parameters.
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ParamContext::parseAllContexts(inifile);
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ParamContext::checkAllContexts();
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// Print hello message to stats file if it's actually a file. If
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// it's not (i.e. it's cout or cerr) then we already did it above.
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if (simout.isFile(*outputStream))
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sayHello(*outputStream);
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// Echo command line and all parameter settings to stats file as well.
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echoCommandLine(argc, argv, *outputStream);
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ParamContext::showAllContexts(*configStream);
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// Do a second pass to finish initializing the sim objects
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SimObject::initAll();
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// Restore checkpointed state, if any.
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configHierarchy.unserializeSimObjects();
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// Done processing the configuration database.
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// Check for unreferenced entries.
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if (inifile.printUnreferenced())
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panic("unreferenced sections/entries in the intermediate ini file");
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SimObject::regAllStats();
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// uncomment the following to get PC-based execution-time profile
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#ifdef DO_PROFILE
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init_profile((char *)&_init, (char *)&_fini);
|
|
#endif
|
|
|
|
// Check to make sure that the stats package is properly initialized
|
|
Stats::check();
|
|
|
|
// Reset to put the stats in a consistent state.
|
|
Stats::reset();
|
|
|
|
warn("Entering event queue. Starting simulation...\n");
|
|
SimStartup();
|
|
while (!mainEventQueue.empty()) {
|
|
assert(curTick <= mainEventQueue.nextTick() &&
|
|
"event scheduled in the past");
|
|
|
|
// forward current cycle to the time of the first event on the
|
|
// queue
|
|
curTick = mainEventQueue.nextTick();
|
|
mainEventQueue.serviceOne();
|
|
|
|
if (async_event) {
|
|
async_event = false;
|
|
if (async_dump) {
|
|
async_dump = false;
|
|
|
|
using namespace Stats;
|
|
SetupEvent(Dump, curTick);
|
|
}
|
|
|
|
if (async_dumpreset) {
|
|
async_dumpreset = false;
|
|
|
|
using namespace Stats;
|
|
SetupEvent(Dump | Reset, curTick);
|
|
}
|
|
|
|
if (async_exit) {
|
|
async_exit = false;
|
|
new SimExitEvent("User requested STOP");
|
|
}
|
|
|
|
if (async_io || async_alarm) {
|
|
async_io = false;
|
|
async_alarm = false;
|
|
pollQueue.service();
|
|
}
|
|
}
|
|
}
|
|
|
|
// This should never happen... every conceivable way for the
|
|
// simulation to terminate (hit max cycles/insts, signal,
|
|
// simulated system halts/exits) generates an exit event, so we
|
|
// should never run out of events on the queue.
|
|
exitNow("no events on event loop! All CPUs must be idle.", 1);
|
|
|
|
return 0;
|
|
}
|