Giacomo Gabrielli 719f9a6d4f O3: Make all instructions that write a misc. register not perform the write until commit. ... ARM instructions updating cumulative flags (ARM FP exceptions and saturation flags) are not serialized. Added aliases for ARM FP exceptions and saturation flags in FPSCR. Removed write accesses to the FP condition codes for most ARM VFP instructions: only VCMP and VCMPE instructions update the FP condition codes. Removed a potential cause of seg. faults in the O3 model for NEON memory macro-ops (ARM).		2010-12-07 16:19:57 -08:00
..
branch.isa	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	2010-10-31 00:07:20 -07:00
decoder.isa	ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.	2010-11-08 13:58:22 -06:00
fp.isa	O3: Make all instructions that write a misc. register not perform the write until commit.	2010-12-07 16:19:57 -08:00
int.isa	Convert Alpha (and finish converting MIPS) to new	2006-12-17 19:27:50 -08:00
main.isa	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	2010-10-31 00:07:20 -07:00
mem.isa	ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.	2010-11-08 13:58:22 -06:00
opcdec.isa	Updated Authors from bk prs info	2006-05-31 19:26:56 -04:00
pal.isa	inorder/alpha-isa: create eaComp object visible to StaticInst through ISA	2009-05-12 15:01:14 -04:00
unimp.isa	Updated Authors from bk prs info	2006-05-31 19:26:56 -04:00
unknown.isa	Updated Authors from bk prs info	2006-05-31 19:26:56 -04:00
util.isa	Updated Authors from bk prs info	2006-05-31 19:26:56 -04:00