e3d5588ca7
cpu/o3/commit_impl.hh:
O3 code update/cleanup. Fetch fault code no longer needed (see previous checkin).
--HG--
extra : convert_revision : f602e7f978e19b8900dce482f38f9c7a195e94da
245 lines
8.2 KiB
C++
245 lines
8.2 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <vector>
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#include "cpu/o3/rename_map.hh"
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using namespace std;
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// @todo: Consider making inline bool functions that determine if the
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// register is a logical int, logical fp, physical int, physical fp,
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// etc.
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SimpleRenameMap::~SimpleRenameMap()
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{
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}
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void
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SimpleRenameMap::init(unsigned _numLogicalIntRegs,
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unsigned _numPhysicalIntRegs,
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PhysRegIndex &ireg_idx,
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unsigned _numLogicalFloatRegs,
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unsigned _numPhysicalFloatRegs,
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PhysRegIndex &freg_idx,
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unsigned _numMiscRegs,
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RegIndex _intZeroReg,
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RegIndex _floatZeroReg,
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int map_id,
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bool bindRegs)
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{
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id = map_id;
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numLogicalIntRegs = _numLogicalIntRegs;
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numLogicalFloatRegs = _numLogicalFloatRegs;
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numPhysicalIntRegs = _numPhysicalIntRegs;
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numPhysicalFloatRegs = _numPhysicalFloatRegs;
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numMiscRegs = _numMiscRegs;
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intZeroReg = _intZeroReg;
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floatZeroReg = _floatZeroReg;
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DPRINTF(Rename, "Creating rename map %i. Phys: %i / %i, Float: "
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"%i / %i.\n", id, numLogicalIntRegs, numPhysicalIntRegs,
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numLogicalFloatRegs, numPhysicalFloatRegs);
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numLogicalRegs = numLogicalIntRegs + numLogicalFloatRegs;
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numPhysicalRegs = numPhysicalIntRegs + numPhysicalFloatRegs;
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//Create the rename maps
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intRenameMap.resize(numLogicalIntRegs);
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floatRenameMap.resize(numLogicalRegs);
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if (bindRegs) {
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DPRINTF(Rename, "Binding registers into rename map %i",id);
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// Initialize the entries in the integer rename map to point to the
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// physical registers of the same index
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for (RegIndex index = 0; index < numLogicalIntRegs; ++index)
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{
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intRenameMap[index].physical_reg = ireg_idx++;
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}
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// Initialize the entries in the floating point rename map to point to
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// the physical registers of the same index
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// Although the index refers purely to architected registers, because
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// the floating reg indices come after the integer reg indices, they
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// may exceed the size of a normal RegIndex (short).
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for (PhysRegIndex index = numLogicalIntRegs;
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index < numLogicalRegs; ++index)
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{
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floatRenameMap[index].physical_reg = freg_idx++;
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}
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} else {
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DPRINTF(Rename, "Binding registers into rename map %i",id);
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PhysRegIndex temp_ireg = ireg_idx;
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for (RegIndex index = 0; index < numLogicalIntRegs; ++index)
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{
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intRenameMap[index].physical_reg = temp_ireg++;
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}
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PhysRegIndex temp_freg = freg_idx;
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for (PhysRegIndex index = numLogicalIntRegs;
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index < numLogicalRegs; ++index)
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{
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floatRenameMap[index].physical_reg = temp_freg++;
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}
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}
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}
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void
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SimpleRenameMap::setFreeList(SimpleFreeList *fl_ptr)
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{
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freeList = fl_ptr;
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}
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SimpleRenameMap::RenameInfo
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SimpleRenameMap::rename(RegIndex arch_reg)
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{
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PhysRegIndex renamed_reg;
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PhysRegIndex prev_reg;
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if (arch_reg < numLogicalIntRegs) {
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// Record the current physical register that is renamed to the
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// requested architected register.
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prev_reg = intRenameMap[arch_reg].physical_reg;
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// If it's not referencing the zero register, then rename the
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// register.
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if (arch_reg != intZeroReg) {
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renamed_reg = freeList->getIntReg();
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intRenameMap[arch_reg].physical_reg = renamed_reg;
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assert(renamed_reg >= 0 && renamed_reg < numPhysicalIntRegs);
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} else {
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// Otherwise return the zero register so nothing bad happens.
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renamed_reg = intZeroReg;
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}
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} else if (arch_reg < numLogicalRegs) {
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// Record the current physical register that is renamed to the
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// requested architected register.
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prev_reg = floatRenameMap[arch_reg].physical_reg;
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// If it's not referencing the zero register, then rename the
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// register.
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if (arch_reg != floatZeroReg) {
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renamed_reg = freeList->getFloatReg();
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floatRenameMap[arch_reg].physical_reg = renamed_reg;
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assert(renamed_reg < numPhysicalRegs &&
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renamed_reg >= numPhysicalIntRegs);
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} else {
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// Otherwise return the zero register so nothing bad happens.
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renamed_reg = floatZeroReg;
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}
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} else {
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// Subtract off the base offset for miscellaneous registers.
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arch_reg = arch_reg - numLogicalRegs;
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// No renaming happens to the misc. registers. They are
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// simply the registers that come after all the physical
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// registers; thus take the base architected register and add
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// the physical registers to it.
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renamed_reg = arch_reg + numPhysicalRegs;
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// Set the previous register to the same register; mainly it must be
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// known that the prev reg was outside the range of normal registers
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// so the free list can avoid adding it.
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prev_reg = renamed_reg;
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assert(renamed_reg < numPhysicalRegs + numMiscRegs);
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}
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return RenameInfo(renamed_reg, prev_reg);
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}
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PhysRegIndex
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SimpleRenameMap::lookup(RegIndex arch_reg)
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{
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if (arch_reg < numLogicalIntRegs) {
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return intRenameMap[arch_reg].physical_reg;
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} else if (arch_reg < numLogicalRegs) {
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return floatRenameMap[arch_reg].physical_reg;
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} else {
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// Subtract off the misc registers offset.
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arch_reg = arch_reg - numLogicalRegs;
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// Misc. regs don't rename, so simply add the base arch reg to
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// the number of physical registers.
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return numPhysicalRegs + arch_reg;
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}
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}
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void
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SimpleRenameMap::setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg)
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{
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// In this implementation the miscellaneous registers do not
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// actually rename, so this function does not allow you to try to
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// change their mappings.
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if (arch_reg < numLogicalIntRegs) {
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DPRINTF(Rename, "Rename Map: Integer register %i being set to %i.\n",
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(int)arch_reg, renamed_reg);
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intRenameMap[arch_reg].physical_reg = renamed_reg;
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} else if (arch_reg < numLogicalIntRegs + numLogicalFloatRegs) {
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DPRINTF(Rename, "Rename Map: Float register %i being set to %i.\n",
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(int)arch_reg - numLogicalIntRegs, renamed_reg);
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floatRenameMap[arch_reg].physical_reg = renamed_reg;
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}
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}
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int
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SimpleRenameMap::numFreeEntries()
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{
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int free_int_regs = freeList->numFreeIntRegs();
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int free_float_regs = freeList->numFreeFloatRegs();
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if (free_int_regs < free_float_regs) {
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return free_int_regs;
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} else {
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return free_float_regs;
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}
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}
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