gem5/src/arch/x86/isa
2008-10-12 15:53:04 -07:00
..
decoder X86: Implement CPUID with a magical function instead of microcode. 2008-10-12 15:31:28 -07:00
formats X86: Implement CPUID with a magical function instead of microcode. 2008-10-12 15:31:28 -07:00
insts X86: Create a SeqOp class of microops and make Br one of them. 2008-10-12 15:33:17 -07:00
microops X86: Create an eret microop which returns from ROM to combinational decoding. 2008-10-12 15:53:04 -07:00
bitfields.isa X86: Add a bitfield to indicate whether or not an REX prefix was present. 2007-07-30 13:17:34 -07:00
includes.isa X86: Implement CPUID with a magical function instead of microcode. 2008-10-12 15:31:28 -07:00
macroop.isa X86: Implement the in/out instructions. These will still need support from the TLB and memory system. 2007-10-18 22:39:00 -07:00
main.isa Pull some hard coded base classes out of the isa description. 2007-07-14 17:14:19 -07:00
microasm.isa X86: Change what the microop chks does. 2008-06-12 00:50:10 -04:00
operands.isa X86: Implement CPUID with a magical function instead of microcode. 2008-10-12 15:31:28 -07:00
outputblock.isa Pull some hard coded base classes out of the isa description. 2007-07-14 17:14:19 -07:00
specialize.isa X86: Reorganize segmentation and implement segment selector movs. 2007-12-01 23:03:39 -08:00