9e45ada171
Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
21 lines
918 B
Text
Executable file
21 lines
918 B
Text
Executable file
Redirecting stdout to build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing/simout
|
|
Redirecting stderr to build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing/simerr
|
|
M5 Simulator System
|
|
|
|
Copyright (c) 2001-2008
|
|
The Regents of The University of Michigan
|
|
All Rights Reserved
|
|
|
|
|
|
M5 compiled Aug 26 2010 11:51:59
|
|
M5 revision 85cafc6ccb42 7662 default qtip tip sc-fail-fix
|
|
M5 started Aug 26 2010 12:11:50
|
|
M5 executing on zizzer
|
|
command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing
|
|
Global frequency set at 1000000000000 ticks per second
|
|
info: Entering event queue @ 0. Starting simulation...
|
|
info: Increasing stack size by one page.
|
|
info: Increasing stack size by one page.
|
|
Hello world!
|
|
Hello world!
|
|
Exiting @ tick 14139000 because target called exit()
|