f6fc18f03d
SConscript:
easier to fix than temporarily remove
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
mem needed for both fullsys and syscall
dev/baddev.cc:
fix for new mem system
dev/io_device.cc:
fix typo
dev/io_device.hh:
PioDevice needs to be a memobject
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
fix for new mem systems
dev/platform.cc:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
rather than the platform have a pointer to pciconfig, go the other
way so all devices are the same and can have a platform pointer
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/uart8250.cc:
python/m5/objects/AlphaConsole.py:
python/m5/objects/BadDevice.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Device.py:
python/m5/objects/Pci.py:
python/m5/objects/PhysicalMemory.py:
python/m5/objects/System.py:
python/m5/objects/Tsunami.py:
python/m5/objects/Uart.py:
fixes for newmem
--HG--
extra : convert_revision : b7b67e19095cca64889f6307725aa2f3d84c7105
27 lines
1,010 B
Python
27 lines
1,010 B
Python
from m5 import *
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class BaseCPU(SimObject):
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type = 'BaseCPU'
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abstract = True
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mem = Param.MemObject("memory")
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if build_env['FULL_SYSTEM']:
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dtb = Param.AlphaDTB("Data TLB")
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itb = Param.AlphaITB("Instruction TLB")
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system = Param.System(Parent.any, "system object")
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cpu_id = Param.Int(-1, "CPU identifier")
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else:
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workload = VectorParam.Process("processes to run")
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max_insts_all_threads = Param.Counter(0,
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"terminate when all threads have reached this inst count")
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max_insts_any_thread = Param.Counter(0,
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"terminate when any thread reaches this inst count")
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max_loads_all_threads = Param.Counter(0,
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"terminate when all threads have reached this load count")
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max_loads_any_thread = Param.Counter(0,
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"terminate when any thread reaches this load count")
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defer_registration = Param.Bool(False,
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"defer registration with system (for sampling)")
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clock = Param.Clock(Parent.clock, "clock speed")
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