1bb293d1e7
Convert condition code registers from being specialized
("pseudo") integer registers to using the recently
added CC register class.
Nilay Vaish also contributed to this patch.
108 lines
4.1 KiB
C++
108 lines
4.1 KiB
C++
/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_X86_X86TRAITS_HH__
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#define __ARCH_X86_X86TRAITS_HH__
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#include <cassert>
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#include "base/types.hh"
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namespace X86ISA
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{
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const int NumMicroIntRegs = 16;
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const int NumImplicitIntRegs = 6;
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//1. The lower part of the result of multiplication.
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//2. The upper part of the result of multiplication.
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//3. The quotient from division
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//4. The remainder from division
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//5. The divisor for division
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//6. The register to use for shift doubles
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const int NumMMXRegs = 8;
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const int NumXMMRegs = 16;
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const int NumMicroFpRegs = 8;
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const int NumCRegs = 16;
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const int NumDRegs = 8;
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const int NumSegments = 6;
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const int NumSysSegments = 4;
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const Addr IntAddrPrefixMask = ULL(0xffffffff00000000);
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const Addr IntAddrPrefixCPUID = ULL(0x100000000);
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const Addr IntAddrPrefixMSR = ULL(0x200000000);
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const Addr IntAddrPrefixIO = ULL(0x300000000);
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const Addr PhysAddrPrefixIO = ULL(0x8000000000000000);
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const Addr PhysAddrPrefixPciConfig = ULL(0xC000000000000000);
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const Addr PhysAddrPrefixLocalAPIC = ULL(0x2000000000000000);
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const Addr PhysAddrPrefixInterrupts = ULL(0xA000000000000000);
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// Each APIC gets two pages. One page is used for local apics to field
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// accesses from the CPU, and the other is for all APICs to communicate.
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const Addr PhysAddrAPICRangeSize = 1 << 12;
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static inline Addr
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x86IOAddress(const uint32_t port)
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{
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return PhysAddrPrefixIO | port;
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}
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static inline Addr
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x86PciConfigAddress(const uint32_t addr)
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{
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return PhysAddrPrefixPciConfig | addr;
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}
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static inline Addr
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x86LocalAPICAddress(const uint8_t id, const uint16_t addr)
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{
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assert(addr < (1 << 12));
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return PhysAddrPrefixLocalAPIC | (id * (1 << 12)) | addr;
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}
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static inline Addr
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x86InterruptAddress(const uint8_t id, const uint16_t addr)
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{
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assert(addr < PhysAddrAPICRangeSize);
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return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr;
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}
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}
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#endif //__ARCH_X86_X86TRAITS_HH__
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