fed0ea55c4
Synchronize with ab19693da "pseudo inst,util: Add optional key to initparam pseudo instruction"
179 lines
5.3 KiB
C
179 lines
5.3 KiB
C
/*
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* Copyright (c) 2010 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Prakash Ramrakhyani
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*/
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#include <stdint.h>
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#include "jni_gem5Op.h"
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#include "m5op.h"
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/**
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C library interface for gem5Op JNI
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*/
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_arm(JNIEnv *env, jobject obj, jlong j_address)
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{
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arm(j_address);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_quiesce(JNIEnv *env, jobject obj)
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{
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quiesce();
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_quiesceNs(JNIEnv *env, jobject obj, jlong j_ns)
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{
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quiesceNs(j_ns);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_quiesceCycle(JNIEnv *env, jobject obj, jlong j_cycles)
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{
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quiesceCycle(j_cycles);
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}
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JNIEXPORT jlong JNICALL
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Java_jni_gem5Op_quiesceTime(JNIEnv *env, jobject obj)
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{
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uint64_t time = quiesceTime();
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if (time & 0x8000000000000000ULL)
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printf("Truncated return value from quiesceTime() to 63 bits\n");
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return (time & 0x7FFFFFFFFFFFFFFFULL);
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}
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JNIEXPORT jlong JNICALL
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Java_jni_gem5Op_rpns(JNIEnv *env, jobject obj)
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{
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uint64_t time = rpns();
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if (time & 0x8000000000000000ULL)
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printf("Truncated return value from rpns() to 63 bits\n");
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return (time & 0x7FFFFFFFFFFFFFFFULL);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_wakeCPU(JNIEnv *env, jobject obj, jlong j_cpuid)
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{
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wakeCPU(j_cpuid);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_exit(JNIEnv *env, jobject obj, jlong j_ns_delay)
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{
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m5_exit(j_ns_delay);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_fail(JNIEnv *env, jobject obj, jlong j_ns_delay, jlong j_code)
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{
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m5_fail(j_ns_delay, j_code);
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}
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JNIEXPORT jlong JNICALL
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Java_jni_gem5Op_initparam(JNIEnv *env, jobject obj, jlong j_key_str1,
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jlong j_key_str2)
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{
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uint64_t param = m5_initparam(j_key_str1, j_key_str2);
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if (param & 0x8000000000000000ULL)
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printf("Truncated return value from m_initparam() to 63 bits\n");
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return (param & 0x7FFFFFFFFFFFFFFFULL);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_checkpoint(JNIEnv *env, jobject obj,
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jlong j_ns_delay, jlong j_ns_period)
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{
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m5_checkpoint(j_ns_delay, j_ns_period);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_reset_1stats(JNIEnv *env, jobject obj,
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jlong j_ns_delay, jlong j_ns_period)
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{
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m5_reset_stats(j_ns_delay, j_ns_period);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_dump_1stats(JNIEnv *env, jobject obj,
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jlong j_ns_delay, jlong j_ns_period)
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{
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m5_dump_stats(j_ns_delay, j_ns_period);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_dumpreset_1stats(JNIEnv *env, jobject obj,
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jlong j_ns_delay, jlong j_ns_period)
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{
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m5_dumpreset_stats(j_ns_delay, j_ns_period);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_debugbreak(JNIEnv *env, jobject obj)
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{
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m5_debugbreak();
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_switchcpu (JNIEnv *env, jobject obj)
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{
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m5_switchcpu();
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_panic(JNIEnv *env, jobject obj)
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{
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m5_panic();
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_work_1begin(JNIEnv *env, jobject obj,
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jlong j_workid, jlong j_threadid)
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{
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m5_work_begin(j_workid, j_threadid);
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}
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JNIEXPORT void JNICALL
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Java_jni_gem5Op_work_1end(JNIEnv *env, jobject obj,
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jlong j_workid, jlong j_threadid)
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{
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m5_work_end(j_workid, j_threadid);
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}
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