fc8fd0fd18
Updated according to GICv2 documentation. Change-Id: I5d926d1abf665eecc43ff0f7d6e561e1ee1c390a Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
81 lines
4 KiB
Python
81 lines
4 KiB
Python
# Copyright (c) 2016 ARM Limited
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# All rights reserved
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# duplicate banked registers into new per-cpu arrays.
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def upgrader(cpt):
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if cpt.get('root','isa') == 'arm':
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for sec in cpt.sections():
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import re
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if not re.search('\.gic$', sec):
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continue
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cpuEnabled = cpt.get(sec, 'cpuEnabled' ).split()
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intEnabled = cpt.get(sec, 'intEnabled' ).split()
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pendingInt = cpt.get(sec, 'pendingInt' ).split()
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activeInt = cpt.get(sec, 'activeInt' ).split()
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intPriority = cpt.get(sec, 'intPriority').split()
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cpuTarget = cpt.get(sec, 'cpuTarget' ).split()
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b_intEnabled = intEnabled[0]
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b_pendingInt = pendingInt[0]
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b_activeInt = activeInt[0]
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b_cpuTarget = cpuTarget[0:32]
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del intEnabled[0]
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del pendingInt[0]
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del activeInt[0]
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del intPriority[0:32] # unused; overlapped with bankedIntPriority
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del cpuTarget[0:32]
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cpt.set(sec, 'intEnabled', ' '.join(intEnabled))
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cpt.set(sec, 'pendingInt', ' '.join(pendingInt))
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cpt.set(sec, 'activeInt', ' '.join(activeInt))
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cpt.set(sec, 'intPriority',' '.join(intPriority))
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cpt.set(sec, 'cpuTarget', ' '.join(cpuTarget))
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b_intPriority = cpt.get(sec, '*bankedIntPriority').split()
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cpt.remove_option(sec, '*bankedIntPriority')
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for cpu in xrange(0, 255):
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if cpuEnabled[cpu] == 'true':
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intPriority = b_intPriority[cpu*32 : (cpu+1)*32]
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new_sec = "%s.bankedRegs%u" % (sec, cpu)
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cpt.add_section(new_sec)
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cpt.set(new_sec, 'intEnabled', b_intEnabled)
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cpt.set(new_sec, 'pendingInt', b_pendingInt)
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cpt.set(new_sec, 'activeInt', b_activeInt)
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cpt.set(new_sec, 'intPriority',' '.join(intPriority))
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cpt.set(new_sec, 'cpuTarget', ' '.join(b_cpuTarget))
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