68fdccb30b
This patch moves the addition of network options into the Ruby module to avoid the regressions all having to add it explicitly. Doing this exposes an issue in our current config system though, namely the fact that addtoPath is relative to the Python script being executed. Since both example and regression scripts use the Ruby module we would end up with two different (relative) paths being added. Instead we take a first step at turning the config modules into Python packages, simply by adding a __init__.py in the configs/ruby, configs/topologies and configs/network subdirectories. As a result, we can now add the top-level configs directory to the Python search path, and then use the package names in the various modules. The example scripts are also updated, and the messy path-deducing variations in the scripts are unified.
759 lines
29 KiB
Python
759 lines
29 KiB
Python
#
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# Copyright (c) 2015 Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# For use for simulation and test purposes only
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# 1. Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer.
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#
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# 2. Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# 3. Neither the name of the copyright holder nor the names of its contributors
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# may be used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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# Author: Sooraj Puthoor
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#
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import math
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import m5
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from m5.objects import *
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from m5.defines import buildEnv
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from Ruby import send_evicts
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from topologies.Cluster import Cluster
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class CntrlBase:
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_seqs = 0
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@classmethod
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def seqCount(cls):
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# Use SeqCount not class since we need global count
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CntrlBase._seqs += 1
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return CntrlBase._seqs - 1
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_cntrls = 0
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@classmethod
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def cntrlCount(cls):
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# Use CntlCount not class since we need global count
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CntrlBase._cntrls += 1
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return CntrlBase._cntrls - 1
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_version = 0
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@classmethod
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def versionCount(cls):
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cls._version += 1 # Use count for this particular type
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return cls._version - 1
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#
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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#
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class L1Cache(RubyCache):
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resourceStalls = False
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dataArrayBanks = 2
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tagArrayBanks = 2
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dataAccessLatency = 1
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tagAccessLatency = 1
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def create(self, size, assoc, options):
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self.size = MemorySize(size)
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self.assoc = assoc
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class L2Cache(RubyCache):
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resourceStalls = False
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assoc = 16
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dataArrayBanks = 16
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tagArrayBanks = 16
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def create(self, size, assoc, options):
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self.size = MemorySize(size)
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self.assoc = assoc
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class CPCntrl(CorePair_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1Icache = L1Cache()
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self.L1Icache.create(options.l1i_size, options.l1i_assoc, options)
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self.L1D0cache = L1Cache()
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self.L1D0cache.create(options.l1d_size, options.l1d_assoc, options)
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self.L1D1cache = L1Cache()
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self.L1D1cache.create(options.l1d_size, options.l1d_assoc, options)
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self.L2cache = L2Cache()
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self.L2cache.create(options.l2_size, options.l2_assoc, options)
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.icache = self.L1Icache
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self.sequencer.dcache = self.L1D0cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.coreid = 0
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self.sequencer.is_cpu_sequencer = True
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self.sequencer1 = RubySequencer()
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self.sequencer1.version = self.seqCount()
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self.sequencer1.icache = self.L1Icache
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self.sequencer1.dcache = self.L1D1cache
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self.sequencer1.ruby_system = ruby_system
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self.sequencer1.coreid = 1
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self.sequencer1.is_cpu_sequencer = True
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self.issue_latency = 1
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self.send_evictions = send_evicts(options)
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class TCPCache(RubyCache):
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size = "16kB"
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assoc = 16
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dataArrayBanks = 16
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tagArrayBanks = 16
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dataAccessLatency = 4
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tagAccessLatency = 1
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def create(self, options):
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self.size = MemorySize(options.tcp_size)
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self.dataArrayBanks = 16
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self.tagArrayBanks = 16
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self.dataAccessLatency = 4
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self.tagAccessLatency = 1
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self.resourceStalls = options.no_tcc_resource_stalls
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self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc)
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class TCPCntrl(TCP_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1cache = TCPCache(dataAccessLatency = options.TCP_latency)
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self.L1cache.create(options)
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self.issue_latency = 1
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self.coalescer = VIPERCoalescer()
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self.coalescer.version = self.seqCount()
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self.coalescer.icache = self.L1cache
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self.coalescer.dcache = self.L1cache
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self.coalescer.ruby_system = ruby_system
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self.coalescer.support_inst_reqs = False
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self.coalescer.is_cpu_sequencer = False
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.icache = self.L1cache
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self.sequencer.dcache = self.L1cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.is_cpu_sequencer = True
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self.use_seq_not_coal = False
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class SQCCache(RubyCache):
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dataArrayBanks = 8
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tagArrayBanks = 8
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dataAccessLatency = 1
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tagAccessLatency = 1
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def create(self, options):
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self.size = MemorySize(options.sqc_size)
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self.assoc = options.sqc_assoc
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self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc)
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class SQCCntrl(SQC_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1cache = SQCCache()
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self.L1cache.create(options)
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self.L1cache.resourceStalls = False
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.icache = self.L1cache
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self.sequencer.dcache = self.L1cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.support_data_reqs = False
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self.sequencer.is_cpu_sequencer = False
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class TCC(RubyCache):
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size = MemorySize("256kB")
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assoc = 16
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dataAccessLatency = 8
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tagAccessLatency = 2
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resourceStalls = False
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def create(self, options):
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self.assoc = options.tcc_assoc
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if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
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s = options.num_compute_units
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tcc_size = s * 128
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tcc_size = str(tcc_size)+'kB'
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self.size = MemorySize(tcc_size)
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self.dataArrayBanks = 64
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self.tagArrayBanks = 64
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else:
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self.size = MemorySize(options.tcc_size)
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self.dataArrayBanks = 256 / options.num_tccs #number of data banks
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self.tagArrayBanks = 256 / options.num_tccs #number of tag banks
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self.size.value = self.size.value / options.num_tccs
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if ((self.size.value / long(self.assoc)) < 128):
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self.size.value = long(128 * self.assoc)
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self.start_index_bit = math.log(options.cacheline_size, 2) + \
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math.log(options.num_tccs, 2)
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self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc)
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class TCCCntrl(TCC_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L2cache = TCC()
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self.L2cache.create(options)
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class L3Cache(RubyCache):
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dataArrayBanks = 16
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tagArrayBanks = 16
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def create(self, options, ruby_system, system):
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self.size = MemorySize(options.l3_size)
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self.size.value /= options.num_dirs
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self.assoc = options.l3_assoc
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self.dataArrayBanks /= options.num_dirs
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self.tagArrayBanks /= options.num_dirs
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self.dataArrayBanks /= options.num_dirs
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self.tagArrayBanks /= options.num_dirs
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self.dataAccessLatency = options.l3_data_latency
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self.tagAccessLatency = options.l3_tag_latency
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self.resourceStalls = False
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self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc)
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class L3Cntrl(L3Cache_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L3cache = L3Cache()
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self.L3cache.create(options, ruby_system, system)
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self.l3_response_latency = \
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max(self.L3cache.dataAccessLatency, self.L3cache.tagAccessLatency)
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
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req_to_l3, probe_to_l3, resp_to_l3):
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self.reqToDir = req_to_dir
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self.respToDir = resp_to_dir
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self.l3UnblockToDir = l3_unblock_to_dir
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self.reqToL3 = req_to_l3
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self.probeToL3 = probe_to_l3
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self.respToL3 = resp_to_l3
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# Directory memory: Directory memory of infinite size which is
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# used by directory controller to store the "states" of the
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# state machine. The state machine is implemented per cache block
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class DirMem(RubyDirectoryMemory, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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phys_mem_size = AddrRange(options.mem_size).size()
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mem_module_size = phys_mem_size / options.num_dirs
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dir_size = MemorySize('0B')
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dir_size.value = mem_module_size
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self.size = dir_size
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# Directory controller: Contains directory memory, L3 cache and associated state
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# machine which is used to accurately redirect a data request to L3 cache or to
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# memory. The permissions requests do not come to this directory for region
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# based protocols as they are handled exclusively by the region directory.
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# However, region directory controller uses this directory controller for
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# sending probe requests and receiving probe responses.
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class DirCntrl(Directory_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.response_latency = 25
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self.response_latency_regionDir = 1
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self.directory = DirMem()
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self.directory.create(options, ruby_system, system)
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self.L3CacheMemory = L3Cache()
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self.L3CacheMemory.create(options, ruby_system, system)
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self.l3_hit_latency = \
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max(self.L3CacheMemory.dataAccessLatency,
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self.L3CacheMemory.tagAccessLatency)
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
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req_to_l3, probe_to_l3, resp_to_l3):
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self.reqToDir = req_to_dir
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self.respToDir = resp_to_dir
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self.l3UnblockToDir = l3_unblock_to_dir
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self.reqToL3 = req_to_l3
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self.probeToL3 = probe_to_l3
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self.respToL3 = resp_to_l3
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# Region directory : Stores region permissions
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class RegionDir(RubyCache):
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def create(self, options, ruby_system, system):
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self.block_size = "%dB" % (64 * options.blocks_per_region)
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self.size = options.region_dir_entries * \
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self.block_size * options.num_compute_units
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self.assoc = 8
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self.tagArrayBanks = 8
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self.tagAccessLatency = options.dir_tag_latency
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self.dataAccessLatency = 1
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self.resourceStalls = options.no_resource_stalls
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self.start_index_bit = 6 + int(math.log(options.blocks_per_region, 2))
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self.replacement_policy = PseudoLRUReplacementPolicy(assoc = self.assoc)
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# Region directory controller : Contains region directory and associated state
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# machine for dealing with region coherence requests.
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class RegionCntrl(RegionDir_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.cacheMemory = RegionDir()
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self.cacheMemory.create(options, ruby_system, system)
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self.blocksPerRegion = options.blocks_per_region
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self.toDirLatency = \
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max(self.cacheMemory.dataAccessLatency,
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self.cacheMemory.tagAccessLatency)
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self.ruby_system = ruby_system
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self.always_migrate = options.always_migrate
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self.sym_migrate = options.symmetric_migrate
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self.asym_migrate = options.asymmetric_migrate
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if self.always_migrate:
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assert(not self.asym_migrate and not self.sym_migrate)
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if self.sym_migrate:
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assert(not self.always_migrate and not self.asym_migrate)
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if self.asym_migrate:
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assert(not self.always_migrate and not self.sym_migrate)
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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# Region Buffer: A region directory cache which avoids some potential
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# long latency lookup of region directory for getting region permissions
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class RegionBuffer(RubyCache):
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assoc = 4
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dataArrayBanks = 256
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tagArrayBanks = 256
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dataAccessLatency = 1
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tagAccessLatency = 1
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resourceStalls = True
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class RBCntrl(RegionBuffer_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.cacheMemory = RegionBuffer()
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self.cacheMemory.resourceStalls = options.no_tcc_resource_stalls
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self.cacheMemory.dataArrayBanks = 64
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self.cacheMemory.tagArrayBanks = 64
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self.blocksPerRegion = options.blocks_per_region
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self.cacheMemory.block_size = "%dB" % (64 * self.blocksPerRegion)
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self.cacheMemory.start_index_bit = \
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6 + int(math.log(self.blocksPerRegion, 2))
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self.cacheMemory.size = options.region_buffer_entries * \
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self.cacheMemory.block_size * options.num_compute_units
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self.toDirLatency = options.gpu_to_dir_latency
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self.toRegionDirLatency = options.cpu_to_dir_latency
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self.noTCCdir = True
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TCC_bits = int(math.log(options.num_tccs, 2))
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self.TCC_select_num_bits = TCC_bits
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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self.cacheMemory.replacement_policy = \
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PseudoLRUReplacementPolicy(assoc = self.cacheMemory.assoc)
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def define_options(parser):
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parser.add_option("--num-subcaches", type="int", default=4)
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parser.add_option("--l3-data-latency", type="int", default=20)
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parser.add_option("--l3-tag-latency", type="int", default=15)
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parser.add_option("--cpu-to-dir-latency", type="int", default=120)
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parser.add_option("--gpu-to-dir-latency", type="int", default=60)
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parser.add_option("--no-resource-stalls", action="store_false",
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default=True)
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parser.add_option("--no-tcc-resource-stalls", action="store_false",
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default=True)
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parser.add_option("--num-tbes", type="int", default=32)
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parser.add_option("--l2-latency", type="int", default=50) # load to use
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parser.add_option("--num-tccs", type="int", default=1,
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help="number of TCC banks in the GPU")
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parser.add_option("--sqc-size", type='string', default='32kB',
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help="SQC cache size")
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parser.add_option("--sqc-assoc", type='int', default=8,
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help="SQC cache assoc")
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parser.add_option("--WB_L1", action="store_true",
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default=False, help="L2 Writeback Cache")
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parser.add_option("--WB_L2", action="store_true",
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default=False, help="L2 Writeback Cache")
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parser.add_option("--TCP_latency",
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type="int", default=4, help="TCP latency")
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parser.add_option("--TCC_latency",
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type="int", default=16, help="TCC latency")
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parser.add_option("--tcc-size", type='string', default='2MB',
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help="agregate tcc size")
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parser.add_option("--tcc-assoc", type='int', default=16,
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help="tcc assoc")
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parser.add_option("--tcp-size", type='string', default='16kB',
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help="tcp size")
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parser.add_option("--dir-tag-latency", type="int", default=4)
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parser.add_option("--dir-tag-banks", type="int", default=4)
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parser.add_option("--blocks-per-region", type="int", default=16)
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parser.add_option("--dir-entries", type="int", default=8192)
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# Region buffer is a cache of region directory. Hence region
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# directory is inclusive with respect to region directory.
|
|
# However, region directory is non-inclusive with respect to
|
|
# the caches in the system
|
|
parser.add_option("--region-dir-entries", type="int", default=1024)
|
|
parser.add_option("--region-buffer-entries", type="int", default=512)
|
|
|
|
parser.add_option("--always-migrate",
|
|
action="store_true", default=False)
|
|
parser.add_option("--symmetric-migrate",
|
|
action="store_true", default=False)
|
|
parser.add_option("--asymmetric-migrate",
|
|
action="store_true", default=False)
|
|
parser.add_option("--use-L3-on-WT", action="store_true", default=False)
|
|
|
|
def create_system(options, full_system, system, dma_devices, ruby_system):
|
|
if buildEnv['PROTOCOL'] != 'GPU_VIPER_Region':
|
|
panic("This script requires the GPU_VIPER_Region protocol to be built.")
|
|
|
|
cpu_sequencers = []
|
|
|
|
#
|
|
# The ruby network creation expects the list of nodes in the system to be
|
|
# consistent with the NetDest list. Therefore the l1 controller nodes
|
|
# must be listed before the directory nodes and directory nodes before
|
|
# dma nodes, etc.
|
|
#
|
|
dir_cntrl_nodes = []
|
|
|
|
# For an odd number of CPUs, still create the right number of controllers
|
|
TCC_bits = int(math.log(options.num_tccs, 2))
|
|
|
|
#
|
|
# Must create the individual controllers before the network to ensure the
|
|
# controller constructors are called before the network constructor
|
|
#
|
|
|
|
# For an odd number of CPUs, still create the right number of controllers
|
|
crossbar_bw = 16 * options.num_compute_units #Assuming a 2GHz clock
|
|
cpuCluster = Cluster(extBW = (crossbar_bw), intBW=crossbar_bw)
|
|
for i in xrange((options.num_cpus + 1) / 2):
|
|
|
|
cp_cntrl = CPCntrl()
|
|
cp_cntrl.create(options, ruby_system, system)
|
|
|
|
rb_cntrl = RBCntrl()
|
|
rb_cntrl.create(options, ruby_system, system)
|
|
rb_cntrl.number_of_TBEs = 256
|
|
rb_cntrl.isOnCPU = True
|
|
|
|
cp_cntrl.regionBufferNum = rb_cntrl.version
|
|
|
|
exec("system.cp_cntrl%d = cp_cntrl" % i)
|
|
exec("system.rb_cntrl%d = rb_cntrl" % i)
|
|
#
|
|
# Add controllers and sequencers to the appropriate lists
|
|
#
|
|
cpu_sequencers.extend([cp_cntrl.sequencer, cp_cntrl.sequencer1])
|
|
|
|
# Connect the CP controllers and the network
|
|
cp_cntrl.requestFromCore = MessageBuffer()
|
|
cp_cntrl.requestFromCore.master = ruby_system.network.slave
|
|
|
|
cp_cntrl.responseFromCore = MessageBuffer()
|
|
cp_cntrl.responseFromCore.master = ruby_system.network.slave
|
|
|
|
cp_cntrl.unblockFromCore = MessageBuffer()
|
|
cp_cntrl.unblockFromCore.master = ruby_system.network.slave
|
|
|
|
cp_cntrl.probeToCore = MessageBuffer()
|
|
cp_cntrl.probeToCore.slave = ruby_system.network.master
|
|
|
|
cp_cntrl.responseToCore = MessageBuffer()
|
|
cp_cntrl.responseToCore.slave = ruby_system.network.master
|
|
|
|
cp_cntrl.mandatoryQueue = MessageBuffer()
|
|
cp_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
# Connect the RB controllers to the ruby network
|
|
rb_cntrl.requestFromCore = MessageBuffer(ordered = True)
|
|
rb_cntrl.requestFromCore.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.responseFromCore = MessageBuffer()
|
|
rb_cntrl.responseFromCore.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.requestToNetwork = MessageBuffer()
|
|
rb_cntrl.requestToNetwork.master = ruby_system.network.slave
|
|
|
|
rb_cntrl.notifyFromRegionDir = MessageBuffer()
|
|
rb_cntrl.notifyFromRegionDir.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.probeFromRegionDir = MessageBuffer()
|
|
rb_cntrl.probeFromRegionDir.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.unblockFromDir = MessageBuffer()
|
|
rb_cntrl.unblockFromDir.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.responseToRegDir = MessageBuffer()
|
|
rb_cntrl.responseToRegDir.master = ruby_system.network.slave
|
|
|
|
rb_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
cpuCluster.add(cp_cntrl)
|
|
cpuCluster.add(rb_cntrl)
|
|
|
|
gpuCluster = Cluster(extBW = (crossbar_bw), intBW = crossbar_bw)
|
|
for i in xrange(options.num_compute_units):
|
|
|
|
tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits,
|
|
issue_latency = 1,
|
|
number_of_TBEs = 2560)
|
|
# TBEs set to max outstanding requests
|
|
tcp_cntrl.create(options, ruby_system, system)
|
|
tcp_cntrl.WB = options.WB_L1
|
|
tcp_cntrl.disableL1 = False
|
|
|
|
exec("system.tcp_cntrl%d = tcp_cntrl" % i)
|
|
#
|
|
# Add controllers and sequencers to the appropriate lists
|
|
#
|
|
cpu_sequencers.append(tcp_cntrl.coalescer)
|
|
|
|
# Connect the CP (TCP) controllers to the ruby network
|
|
tcp_cntrl.requestFromTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.requestFromTCP.master = ruby_system.network.slave
|
|
|
|
tcp_cntrl.responseFromTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.responseFromTCP.master = ruby_system.network.slave
|
|
|
|
tcp_cntrl.unblockFromCore = MessageBuffer()
|
|
tcp_cntrl.unblockFromCore.master = ruby_system.network.slave
|
|
|
|
tcp_cntrl.probeToTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.probeToTCP.slave = ruby_system.network.master
|
|
|
|
tcp_cntrl.responseToTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.responseToTCP.slave = ruby_system.network.master
|
|
|
|
tcp_cntrl.mandatoryQueue = MessageBuffer()
|
|
|
|
gpuCluster.add(tcp_cntrl)
|
|
|
|
for i in xrange(options.num_sqc):
|
|
|
|
sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits)
|
|
sqc_cntrl.create(options, ruby_system, system)
|
|
|
|
exec("system.sqc_cntrl%d = sqc_cntrl" % i)
|
|
#
|
|
# Add controllers and sequencers to the appropriate lists
|
|
#
|
|
cpu_sequencers.append(sqc_cntrl.sequencer)
|
|
|
|
# Connect the SQC controller to the ruby network
|
|
sqc_cntrl.requestFromSQC = MessageBuffer(ordered = True)
|
|
sqc_cntrl.requestFromSQC.master = ruby_system.network.slave
|
|
|
|
sqc_cntrl.probeToSQC = MessageBuffer(ordered = True)
|
|
sqc_cntrl.probeToSQC.slave = ruby_system.network.master
|
|
|
|
sqc_cntrl.responseToSQC = MessageBuffer(ordered = True)
|
|
sqc_cntrl.responseToSQC.slave = ruby_system.network.master
|
|
|
|
sqc_cntrl.mandatoryQueue = MessageBuffer()
|
|
|
|
# SQC also in GPU cluster
|
|
gpuCluster.add(sqc_cntrl)
|
|
|
|
numa_bit = 6
|
|
|
|
for i in xrange(options.num_tccs):
|
|
|
|
tcc_cntrl = TCCCntrl()
|
|
tcc_cntrl.create(options, ruby_system, system)
|
|
tcc_cntrl.l2_request_latency = 1
|
|
tcc_cntrl.l2_response_latency = options.TCC_latency
|
|
tcc_cntrl.WB = options.WB_L2
|
|
tcc_cntrl.number_of_TBEs = 2560 * options.num_compute_units
|
|
|
|
# Connect the TCC controllers to the ruby network
|
|
tcc_cntrl.requestFromTCP = MessageBuffer(ordered = True)
|
|
tcc_cntrl.requestFromTCP.slave = ruby_system.network.master
|
|
|
|
tcc_cntrl.responseToCore = MessageBuffer(ordered = True)
|
|
tcc_cntrl.responseToCore.master = ruby_system.network.slave
|
|
|
|
tcc_cntrl.probeFromNB = MessageBuffer()
|
|
tcc_cntrl.probeFromNB.slave = ruby_system.network.master
|
|
|
|
tcc_cntrl.responseFromNB = MessageBuffer()
|
|
tcc_cntrl.responseFromNB.slave = ruby_system.network.master
|
|
|
|
tcc_cntrl.requestToNB = MessageBuffer(ordered = True)
|
|
tcc_cntrl.requestToNB.master = ruby_system.network.slave
|
|
|
|
tcc_cntrl.responseToNB = MessageBuffer()
|
|
tcc_cntrl.responseToNB.master = ruby_system.network.slave
|
|
|
|
tcc_cntrl.unblockToNB = MessageBuffer()
|
|
tcc_cntrl.unblockToNB.master = ruby_system.network.slave
|
|
|
|
tcc_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
rb_cntrl = RBCntrl()
|
|
rb_cntrl.create(options, ruby_system, system)
|
|
rb_cntrl.number_of_TBEs = 2560 * options.num_compute_units
|
|
rb_cntrl.isOnCPU = False
|
|
|
|
# Connect the RB controllers to the ruby network
|
|
rb_cntrl.requestFromCore = MessageBuffer(ordered = True)
|
|
rb_cntrl.requestFromCore.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.responseFromCore = MessageBuffer()
|
|
rb_cntrl.responseFromCore.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.requestToNetwork = MessageBuffer()
|
|
rb_cntrl.requestToNetwork.master = ruby_system.network.slave
|
|
|
|
rb_cntrl.notifyFromRegionDir = MessageBuffer()
|
|
rb_cntrl.notifyFromRegionDir.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.probeFromRegionDir = MessageBuffer()
|
|
rb_cntrl.probeFromRegionDir.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.unblockFromDir = MessageBuffer()
|
|
rb_cntrl.unblockFromDir.slave = ruby_system.network.master
|
|
|
|
rb_cntrl.responseToRegDir = MessageBuffer()
|
|
rb_cntrl.responseToRegDir.master = ruby_system.network.slave
|
|
|
|
rb_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
tcc_cntrl.regionBufferNum = rb_cntrl.version
|
|
|
|
exec("system.tcc_cntrl%d = tcc_cntrl" % i)
|
|
exec("system.tcc_rb_cntrl%d = rb_cntrl" % i)
|
|
|
|
# TCC cntrls added to the GPU cluster
|
|
gpuCluster.add(tcc_cntrl)
|
|
gpuCluster.add(rb_cntrl)
|
|
|
|
# Because of wire buffers, num_l3caches must equal num_dirs
|
|
# Region coherence only works with 1 dir
|
|
assert(options.num_l3caches == options.num_dirs == 1)
|
|
|
|
# This is the base crossbar that connects the L3s, Dirs, and cpu/gpu
|
|
# Clusters
|
|
mainCluster = Cluster(intBW = crossbar_bw)
|
|
|
|
dir_cntrl = DirCntrl()
|
|
dir_cntrl.create(options, ruby_system, system)
|
|
dir_cntrl.number_of_TBEs = 2560 * options.num_compute_units
|
|
dir_cntrl.useL3OnWT = options.use_L3_on_WT
|
|
|
|
# Connect the Directory controller to the ruby network
|
|
dir_cntrl.requestFromCores = MessageBuffer()
|
|
dir_cntrl.requestFromCores.slave = ruby_system.network.master
|
|
|
|
dir_cntrl.responseFromCores = MessageBuffer()
|
|
dir_cntrl.responseFromCores.slave = ruby_system.network.master
|
|
|
|
dir_cntrl.unblockFromCores = MessageBuffer()
|
|
dir_cntrl.unblockFromCores.slave = ruby_system.network.master
|
|
|
|
dir_cntrl.probeToCore = MessageBuffer()
|
|
dir_cntrl.probeToCore.master = ruby_system.network.slave
|
|
|
|
dir_cntrl.responseToCore = MessageBuffer()
|
|
dir_cntrl.responseToCore.master = ruby_system.network.slave
|
|
|
|
dir_cntrl.reqFromRegBuf = MessageBuffer()
|
|
dir_cntrl.reqFromRegBuf.slave = ruby_system.network.master
|
|
|
|
dir_cntrl.reqToRegDir = MessageBuffer(ordered = True)
|
|
dir_cntrl.reqToRegDir.master = ruby_system.network.slave
|
|
|
|
dir_cntrl.reqFromRegDir = MessageBuffer(ordered = True)
|
|
dir_cntrl.reqFromRegDir.slave = ruby_system.network.master
|
|
|
|
dir_cntrl.unblockToRegDir = MessageBuffer()
|
|
dir_cntrl.unblockToRegDir.master = ruby_system.network.slave
|
|
|
|
dir_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
dir_cntrl.L3triggerQueue = MessageBuffer(ordered = True)
|
|
dir_cntrl.responseFromMemory = MessageBuffer()
|
|
|
|
exec("system.dir_cntrl%d = dir_cntrl" % i)
|
|
dir_cntrl_nodes.append(dir_cntrl)
|
|
|
|
mainCluster.add(dir_cntrl)
|
|
|
|
reg_cntrl = RegionCntrl(noTCCdir=True,TCC_select_num_bits = TCC_bits)
|
|
reg_cntrl.create(options, ruby_system, system)
|
|
reg_cntrl.number_of_TBEs = options.num_tbes
|
|
reg_cntrl.cpuRegionBufferNum = system.rb_cntrl0.version
|
|
reg_cntrl.gpuRegionBufferNum = system.tcc_rb_cntrl0.version
|
|
|
|
# Connect the Region Dir controllers to the ruby network
|
|
reg_cntrl.requestToDir = MessageBuffer(ordered = True)
|
|
reg_cntrl.requestToDir.master = ruby_system.network.slave
|
|
|
|
reg_cntrl.notifyToRBuffer = MessageBuffer()
|
|
reg_cntrl.notifyToRBuffer.master = ruby_system.network.slave
|
|
|
|
reg_cntrl.probeToRBuffer = MessageBuffer()
|
|
reg_cntrl.probeToRBuffer.master = ruby_system.network.slave
|
|
|
|
reg_cntrl.responseFromRBuffer = MessageBuffer()
|
|
reg_cntrl.responseFromRBuffer.slave = ruby_system.network.master
|
|
|
|
reg_cntrl.requestFromRegBuf = MessageBuffer()
|
|
reg_cntrl.requestFromRegBuf.slave = ruby_system.network.master
|
|
|
|
reg_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
exec("system.reg_cntrl%d = reg_cntrl" % i)
|
|
|
|
mainCluster.add(reg_cntrl)
|
|
|
|
# Assuming no DMA devices
|
|
assert(len(dma_devices) == 0)
|
|
|
|
# Add cpu/gpu clusters to main cluster
|
|
mainCluster.add(cpuCluster)
|
|
mainCluster.add(gpuCluster)
|
|
|
|
ruby_system.network.number_of_virtual_networks = 10
|
|
|
|
return (cpu_sequencers, dir_cntrl_nodes, mainCluster)
|