into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem configs/boot/micro_memlat.rcS: configs/boot/micro_tlblat.rcS: src/arch/alpha/ev5.cc: src/arch/alpha/isa/decoder.isa: src/arch/alpha/isa_traits.hh: src/cpu/base.cc: src/cpu/base.hh: src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.hh: src/cpu/checker/cpu_impl.hh: src/cpu/o3/alpha/cpu_impl.hh: src/cpu/o3/alpha/params.hh: src/cpu/o3/checker_builder.cc: src/cpu/o3/commit_impl.hh: src/cpu/o3/cpu.cc: src/cpu/o3/decode_impl.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/iew.hh: src/cpu/o3/iew_impl.hh: src/cpu/o3/inst_queue.hh: src/cpu/o3/lsq.hh: src/cpu/o3/lsq_impl.hh: src/cpu/o3/lsq_unit.hh: src/cpu/o3/lsq_unit_impl.hh: src/cpu/o3/regfile.hh: src/cpu/o3/rename_impl.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/checker_builder.cc: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/thread_state.hh: src/cpu/simple/base.cc: src/cpu/simple_thread.cc: src/cpu/simple_thread.hh: src/cpu/thread_state.hh: src/dev/ide_disk.cc: src/python/m5/objects/O3CPU.py: src/python/m5/objects/Root.py: src/python/m5/objects/System.py: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: src/sim/system.hh: util/m5/m5.c: Hand merge. --HG-- rename : arch/alpha/ev5.cc => src/arch/alpha/ev5.cc rename : arch/alpha/freebsd/system.cc => src/arch/alpha/freebsd/system.cc rename : arch/alpha/isa/decoder.isa => src/arch/alpha/isa/decoder.isa rename : arch/alpha/isa/mem.isa => src/arch/alpha/isa/mem.isa rename : arch/alpha/isa_traits.hh => src/arch/alpha/isa_traits.hh rename : arch/alpha/linux/system.cc => src/arch/alpha/linux/system.cc rename : arch/alpha/system.cc => src/arch/alpha/system.cc rename : arch/alpha/tru64/system.cc => src/arch/alpha/tru64/system.cc rename : cpu/base.cc => src/cpu/base.cc rename : cpu/base.hh => src/cpu/base.hh rename : cpu/base_dyn_inst.hh => src/cpu/base_dyn_inst.hh rename : cpu/checker/cpu.hh => src/cpu/checker/cpu.hh rename : cpu/checker/cpu.cc => src/cpu/checker/cpu_impl.hh rename : cpu/o3/alpha_cpu_builder.cc => src/cpu/o3/alpha/cpu_builder.cc rename : cpu/checker/o3_cpu_builder.cc => src/cpu/o3/checker_builder.cc rename : cpu/o3/commit_impl.hh => src/cpu/o3/commit_impl.hh rename : cpu/o3/cpu.cc => src/cpu/o3/cpu.cc rename : cpu/o3/fetch_impl.hh => src/cpu/o3/fetch_impl.hh rename : cpu/o3/iew.hh => src/cpu/o3/iew.hh rename : cpu/o3/iew_impl.hh => src/cpu/o3/iew_impl.hh rename : cpu/o3/inst_queue.hh => src/cpu/o3/inst_queue.hh rename : cpu/o3/inst_queue_impl.hh => src/cpu/o3/inst_queue_impl.hh rename : cpu/o3/lsq_impl.hh => src/cpu/o3/lsq_impl.hh rename : cpu/o3/lsq_unit.hh => src/cpu/o3/lsq_unit.hh rename : cpu/o3/lsq_unit_impl.hh => src/cpu/o3/lsq_unit_impl.hh rename : cpu/o3/mem_dep_unit_impl.hh => src/cpu/o3/mem_dep_unit_impl.hh rename : cpu/o3/rename.hh => src/cpu/o3/rename.hh rename : cpu/o3/rename_impl.hh => src/cpu/o3/rename_impl.hh rename : cpu/o3/thread_state.hh => src/cpu/o3/thread_state.hh rename : cpu/o3/tournament_pred.cc => src/cpu/o3/tournament_pred.cc rename : cpu/o3/tournament_pred.hh => src/cpu/o3/tournament_pred.hh rename : cpu/checker/cpu_builder.cc => src/cpu/ozone/checker_builder.cc rename : cpu/ozone/cpu.hh => src/cpu/ozone/cpu.hh rename : cpu/ozone/cpu_builder.cc => src/cpu/ozone/cpu_builder.cc rename : cpu/ozone/cpu_impl.hh => src/cpu/ozone/cpu_impl.hh rename : cpu/ozone/front_end.hh => src/cpu/ozone/front_end.hh rename : cpu/ozone/front_end_impl.hh => src/cpu/ozone/front_end_impl.hh rename : cpu/ozone/inorder_back_end_impl.hh => src/cpu/ozone/inorder_back_end_impl.hh rename : cpu/ozone/inst_queue_impl.hh => src/cpu/ozone/inst_queue_impl.hh rename : cpu/ozone/lw_back_end.hh => src/cpu/ozone/lw_back_end.hh rename : cpu/ozone/lw_back_end_impl.hh => src/cpu/ozone/lw_back_end_impl.hh rename : cpu/ozone/lw_lsq.hh => src/cpu/ozone/lw_lsq.hh rename : cpu/ozone/lw_lsq_impl.hh => src/cpu/ozone/lw_lsq_impl.hh rename : cpu/ozone/simple_params.hh => src/cpu/ozone/simple_params.hh rename : cpu/ozone/thread_state.hh => src/cpu/ozone/thread_state.hh rename : cpu/simple/cpu.cc => src/cpu/simple/base.cc rename : cpu/cpu_exec_context.cc => src/cpu/simple_thread.cc rename : cpu/thread_state.hh => src/cpu/thread_state.hh rename : dev/ide_disk.hh => src/dev/ide_disk.hh rename : python/m5/objects/BaseCPU.py => src/python/m5/objects/BaseCPU.py rename : python/m5/objects/AlphaFullCPU.py => src/python/m5/objects/O3CPU.py rename : python/m5/objects/OzoneCPU.py => src/python/m5/objects/OzoneCPU.py rename : python/m5/objects/Root.py => src/python/m5/objects/Root.py rename : python/m5/objects/System.py => src/python/m5/objects/System.py rename : sim/eventq.hh => src/sim/eventq.hh rename : sim/pseudo_inst.cc => src/sim/pseudo_inst.cc rename : sim/pseudo_inst.hh => src/sim/pseudo_inst.hh rename : sim/serialize.cc => src/sim/serialize.cc rename : sim/stat_control.cc => src/sim/stat_control.cc rename : sim/stat_control.hh => src/sim/stat_control.hh rename : sim/system.hh => src/sim/system.hh extra : convert_revision : 135d90e43f6cea89f9460ba4e23f4b0b85886e7d
221 lines
7.5 KiB
C++
221 lines
7.5 KiB
C++
/*
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* Copyright (c) 2004-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Kevin Lim
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*/
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#ifndef __CPU_O3_TOURNAMENT_PRED_HH__
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#define __CPU_O3_TOURNAMENT_PRED_HH__
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#include "cpu/o3/sat_counter.hh"
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#include "sim/host.hh"
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#include <vector>
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/**
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* Implements a tournament branch predictor, hopefully identical to the one
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* used in the 21264. It has a local predictor, which uses a local history
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* table to index into a table of counters, and a global predictor, which
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* uses a global history to index into a table of counters. A choice
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* predictor chooses between the two. Only the global history register
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* is speculatively updated, the rest are updated upon branches committing
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* or misspeculating.
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*/
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class TournamentBP
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{
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public:
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/**
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* Default branch predictor constructor.
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*/
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TournamentBP(unsigned localPredictorSize,
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unsigned localCtrBits,
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unsigned localHistoryTableSize,
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unsigned localHistoryBits,
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unsigned globalPredictorSize,
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unsigned globalHistoryBits,
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unsigned globalCtrBits,
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unsigned choicePredictorSize,
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unsigned choiceCtrBits,
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unsigned instShiftAmt);
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/**
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* Looks up the given address in the branch predictor and returns
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* a true/false value as to whether it is taken. Also creates a
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* BPHistory object to store any state it will need on squash/update.
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* @param branch_addr The address of the branch to look up.
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* @param bp_history Pointer that will be set to the BPHistory object.
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* @return Whether or not the branch is taken.
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*/
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bool lookup(Addr &branch_addr, void * &bp_history);
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/**
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* Records that there was an unconditional branch, and modifies
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* the bp history to point to an object that has the previous
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* global history stored in it.
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* @param bp_history Pointer that will be set to the BPHistory object.
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*/
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void uncondBr(void * &bp_history);
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/**
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* Updates the branch predictor with the actual result of a branch.
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* @param branch_addr The address of the branch to update.
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* @param taken Whether or not the branch was taken.
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* @param bp_history Pointer to the BPHistory object that was created
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* when the branch was predicted.
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*/
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void update(Addr &branch_addr, bool taken, void *bp_history);
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/**
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* Restores the global branch history on a squash.
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* @param bp_history Pointer to the BPHistory object that has the
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* previous global branch history in it.
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*/
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void squash(void *bp_history);
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/** Returns the global history. */
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inline unsigned readGlobalHist() { return globalHistory; }
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private:
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/**
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* Returns if the branch should be taken or not, given a counter
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* value.
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* @param count The counter value.
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*/
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inline bool getPrediction(uint8_t &count);
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/**
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* Returns the local history index, given a branch address.
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* @param branch_addr The branch's PC address.
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*/
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inline unsigned calcLocHistIdx(Addr &branch_addr);
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/** Updates global history as taken. */
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inline void updateGlobalHistTaken();
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/** Updates global history as not taken. */
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inline void updateGlobalHistNotTaken();
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/**
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* Updates local histories as taken.
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* @param local_history_idx The local history table entry that
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* will be updated.
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*/
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inline void updateLocalHistTaken(unsigned local_history_idx);
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/**
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* Updates local histories as not taken.
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* @param local_history_idx The local history table entry that
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* will be updated.
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*/
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inline void updateLocalHistNotTaken(unsigned local_history_idx);
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/**
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* The branch history information that is created upon predicting
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* a branch. It will be passed back upon updating and squashing,
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* when the BP can use this information to update/restore its
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* state properly.
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*/
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struct BPHistory {
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#ifdef DEBUG
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BPHistory()
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{ newCount++; }
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~BPHistory()
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{ newCount--; }
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static int newCount;
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#endif
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unsigned globalHistory;
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bool localPredTaken;
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bool globalPredTaken;
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bool globalUsed;
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};
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/** Local counters. */
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std::vector<SatCounter> localCtrs;
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/** Size of the local predictor. */
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unsigned localPredictorSize;
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/** Mask to get the proper index bits into the predictor. */
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unsigned localPredictorMask;
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/** Number of bits of the local predictor's counters. */
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unsigned localCtrBits;
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/** Array of local history table entries. */
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std::vector<unsigned> localHistoryTable;
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/** Size of the local history table. */
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unsigned localHistoryTableSize;
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/** Number of bits for each entry of the local history table.
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* @todo Doesn't this come from the size of the local predictor?
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*/
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unsigned localHistoryBits;
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/** Mask to get the proper local history. */
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unsigned localHistoryMask;
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/** Array of counters that make up the global predictor. */
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std::vector<SatCounter> globalCtrs;
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/** Size of the global predictor. */
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unsigned globalPredictorSize;
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/** Number of bits of the global predictor's counters. */
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unsigned globalCtrBits;
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/** Global history register. */
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unsigned globalHistory;
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/** Number of bits for the global history. */
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unsigned globalHistoryBits;
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/** Mask to get the proper global history. */
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unsigned globalHistoryMask;
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/** Array of counters that make up the choice predictor. */
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std::vector<SatCounter> choiceCtrs;
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/** Size of the choice predictor (identical to the global predictor). */
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unsigned choicePredictorSize;
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/** Number of bits of the choice predictor's counters. */
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unsigned choiceCtrBits;
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/** Number of bits to shift the instruction over to get rid of the word
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* offset.
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*/
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unsigned instShiftAmt;
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/** Threshold for the counter value; above the threshold is taken,
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* equal to or below the threshold is not taken.
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*/
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unsigned threshold;
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};
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#endif // __CPU_O3_TOURNAMENT_PRED_HH__
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