Gene Wu 66bcbec96e ARM: BX instruction can be contitional if last instruction in a IT block ... Branches are allowed to be the last instuction in an IT block. Before it was assumed that they could not. So Branches in thumb2 were Uncond.		2010-08-23 11:18:41 -05:00
..
decoder	ARM: Decode the neon instruction space.	2010-06-02 12:58:18 -05:00
formats	ARM: BX instruction can be contitional if last instruction in a IT block	2010-08-23 11:18:41 -05:00
insts	ARM: BX instruction can be contitional if last instruction in a IT block	2010-08-23 11:18:41 -05:00
templates	ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.	2010-08-23 11:18:40 -05:00
bitfields.isa	ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.	2010-06-02 12:58:07 -05:00
copyright.txt	ARM: Remove IsControl from operands that don't imply control transfers.	2010-06-02 12:57:59 -05:00
includes.isa	ARM: Implement the version of VMRS that writes to the APSR.	2010-06-02 12:58:15 -05:00
main.isa	ARM: Define the load instructions from outside the decoder.	2010-06-02 12:58:01 -05:00
operands.isa	ARM: Decode to specialized conditional/unconditional versions of instructions.	2010-06-02 12:58:17 -05:00