gem5/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.json
2015-08-30 12:24:19 -05:00

406 lines
15 KiB
JSON

{
"name": null,
"sim_quantum": 0,
"system": {
"kernel": "",
"mmap_using_noreserve": false,
"kernel_addr_check": true,
"membus": {
"slave": {
"peer": [
"system.system_port",
"system.cpu.l2cache.mem_side"
],
"role": "SLAVE"
},
"name": "membus",
"snoop_filter": null,
"forward_latency": 4,
"clk_domain": "system.clk_domain",
"system": "system",
"width": 16,
"eventq_index": 0,
"master": {
"peer": [
"system.physmem.port"
],
"role": "MASTER"
},
"response_latency": 2,
"cxx_class": "CoherentXBar",
"path": "system.membus",
"snoop_response_latency": 4,
"type": "CoherentXBar",
"use_default_range": false,
"frontend_latency": 3
},
"symbolfile": "",
"readfile": "",
"cxx_class": "System",
"load_offset": 0,
"work_end_ckpt_count": 0,
"memories": [
"system.physmem"
],
"work_begin_ckpt_count": 0,
"clk_domain": {
"name": "clk_domain",
"clock": [
1000
],
"init_perf_level": 0,
"voltage_domain": "system.voltage_domain",
"eventq_index": 0,
"cxx_class": "SrcClockDomain",
"path": "system.clk_domain",
"type": "SrcClockDomain",
"domain_id": -1
},
"mem_ranges": [],
"eventq_index": 0,
"dvfs_handler": {
"enable": false,
"name": "dvfs_handler",
"sys_clk_domain": "system.clk_domain",
"transition_latency": 100000000,
"eventq_index": 0,
"cxx_class": "DVFSHandler",
"domains": [],
"path": "system.dvfs_handler",
"type": "DVFSHandler"
},
"work_end_exit_count": 0,
"type": "System",
"voltage_domain": {
"name": "voltage_domain",
"eventq_index": 0,
"voltage": [
"1.0"
],
"cxx_class": "VoltageDomain",
"path": "system.voltage_domain",
"type": "VoltageDomain"
},
"cache_line_size": 64,
"boot_osflags": "a",
"physmem": {
"range": "0:134217727",
"latency": 30000,
"name": "physmem",
"eventq_index": 0,
"clk_domain": "system.clk_domain",
"latency_var": 0,
"bandwidth": "73.000000",
"conf_table_reported": true,
"cxx_class": "SimpleMemory",
"path": "system.physmem",
"null": false,
"type": "SimpleMemory",
"port": {
"peer": "system.membus.master[0]",
"role": "SLAVE"
},
"in_addr_map": true
},
"work_cpus_ckpt_count": 0,
"work_begin_exit_count": 0,
"path": "system",
"cpu_clk_domain": {
"name": "cpu_clk_domain",
"clock": [
500
],
"init_perf_level": 0,
"voltage_domain": "system.voltage_domain",
"eventq_index": 0,
"cxx_class": "SrcClockDomain",
"path": "system.cpu_clk_domain",
"type": "SrcClockDomain",
"domain_id": -1
},
"mem_mode": "timing",
"name": "system",
"init_param": 0,
"system_port": {
"peer": "system.membus.slave[0]",
"role": "MASTER"
},
"load_addr_mask": 1099511627775,
"cpu": [
{
"do_statistics_insts": true,
"numThreads": 1,
"itb": {
"name": "itb",
"eventq_index": 0,
"cxx_class": "AlphaISA::TLB",
"path": "system.cpu.itb",
"type": "AlphaTLB",
"size": 48
},
"system": "system",
"function_trace": false,
"do_checkpoint_insts": true,
"cxx_class": "TimingSimpleCPU",
"max_loads_all_threads": 0,
"clk_domain": "system.cpu_clk_domain",
"function_trace_start": 0,
"cpu_id": 0,
"checker": null,
"eventq_index": 0,
"toL2Bus": {
"slave": {
"peer": [
"system.cpu.icache.mem_side",
"system.cpu.dcache.mem_side"
],
"role": "SLAVE"
},
"name": "toL2Bus",
"snoop_filter": null,
"forward_latency": 0,
"clk_domain": "system.cpu_clk_domain",
"system": "system",
"width": 32,
"eventq_index": 0,
"master": {
"peer": [
"system.cpu.l2cache.cpu_side"
],
"role": "MASTER"
},
"response_latency": 1,
"cxx_class": "CoherentXBar",
"path": "system.cpu.toL2Bus",
"snoop_response_latency": 1,
"type": "CoherentXBar",
"use_default_range": false,
"frontend_latency": 1
},
"do_quiesce": true,
"type": "TimingSimpleCPU",
"profile": 0,
"icache_port": {
"peer": "system.cpu.icache.cpu_side",
"role": "MASTER"
},
"icache": {
"cpu_side": {
"peer": "system.cpu.icache_port",
"role": "SLAVE"
},
"prefetcher": null,
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 2,
"cxx_class": "Cache",
"size": 131072,
"tags": {
"name": "tags",
"eventq_index": 0,
"hit_latency": 2,
"clk_domain": "system.cpu_clk_domain",
"sequential_access": false,
"assoc": 2,
"cxx_class": "LRU",
"path": "system.cpu.icache.tags",
"block_size": 64,
"type": "LRU",
"size": 131072
},
"system": "system",
"max_miss_count": 0,
"eventq_index": 0,
"mem_side": {
"peer": "system.cpu.toL2Bus.slave[0]",
"role": "MASTER"
},
"mshrs": 4,
"forward_snoops": true,
"hit_latency": 2,
"demand_mshr_reserve": 1,
"tgts_per_mshr": 20,
"addr_ranges": [
"0:18446744073709551615"
],
"is_read_only": true,
"prefetch_on_access": false,
"path": "system.cpu.icache",
"name": "icache",
"type": "Cache",
"sequential_access": false,
"assoc": 2
},
"interrupts": {
"eventq_index": 0,
"path": "system.cpu.interrupts",
"type": "AlphaInterrupts",
"name": "interrupts",
"cxx_class": "AlphaISA::Interrupts"
},
"dcache_port": {
"peer": "system.cpu.dcache.cpu_side",
"role": "MASTER"
},
"socket_id": 0,
"max_insts_all_threads": 0,
"l2cache": {
"cpu_side": {
"peer": "system.cpu.toL2Bus.master[0]",
"role": "SLAVE"
},
"prefetcher": null,
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 20,
"cxx_class": "Cache",
"size": 2097152,
"tags": {
"name": "tags",
"eventq_index": 0,
"hit_latency": 20,
"clk_domain": "system.cpu_clk_domain",
"sequential_access": false,
"assoc": 8,
"cxx_class": "LRU",
"path": "system.cpu.l2cache.tags",
"block_size": 64,
"type": "LRU",
"size": 2097152
},
"system": "system",
"max_miss_count": 0,
"eventq_index": 0,
"mem_side": {
"peer": "system.membus.slave[1]",
"role": "MASTER"
},
"mshrs": 20,
"forward_snoops": true,
"hit_latency": 20,
"demand_mshr_reserve": 1,
"tgts_per_mshr": 12,
"addr_ranges": [
"0:18446744073709551615"
],
"is_read_only": false,
"prefetch_on_access": false,
"path": "system.cpu.l2cache",
"name": "l2cache",
"type": "Cache",
"sequential_access": false,
"assoc": 8
},
"path": "system.cpu",
"max_loads_any_thread": 0,
"switched_out": false,
"workload": [
{
"name": "workload",
"output": "cout",
"chkpt": "",
"errout": "cerr",
"kvmInSE": false,
"system": "system",
"useArchPT": false,
"eventq_index": 0,
"file": "/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
"cxx_class": "EioProcess",
"path": "system.cpu.workload",
"max_stack_size": 67108864,
"type": "EioProcess",
"input": "cin"
}
],
"name": "cpu",
"dtb": {
"name": "dtb",
"eventq_index": 0,
"cxx_class": "AlphaISA::TLB",
"path": "system.cpu.dtb",
"type": "AlphaTLB",
"size": 64
},
"simpoint_start_insts": [],
"max_insts_any_thread": 500000,
"progress_interval": 0,
"branchPred": null,
"dcache": {
"cpu_side": {
"peer": "system.cpu.dcache_port",
"role": "SLAVE"
},
"prefetcher": null,
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"response_latency": 2,
"cxx_class": "Cache",
"size": 262144,
"tags": {
"name": "tags",
"eventq_index": 0,
"hit_latency": 2,
"clk_domain": "system.cpu_clk_domain",
"sequential_access": false,
"assoc": 2,
"cxx_class": "LRU",
"path": "system.cpu.dcache.tags",
"block_size": 64,
"type": "LRU",
"size": 262144
},
"system": "system",
"max_miss_count": 0,
"eventq_index": 0,
"mem_side": {
"peer": "system.cpu.toL2Bus.slave[1]",
"role": "MASTER"
},
"mshrs": 4,
"forward_snoops": true,
"hit_latency": 2,
"demand_mshr_reserve": 1,
"tgts_per_mshr": 20,
"addr_ranges": [
"0:18446744073709551615"
],
"is_read_only": false,
"prefetch_on_access": false,
"path": "system.cpu.dcache",
"name": "dcache",
"type": "Cache",
"sequential_access": false,
"assoc": 2
},
"isa": [
{
"name": "isa",
"system": "system",
"eventq_index": 0,
"cxx_class": "AlphaISA::ISA",
"path": "system.cpu.isa",
"type": "AlphaISA"
}
],
"tracer": {
"eventq_index": 0,
"path": "system.cpu.tracer",
"type": "ExeTracer",
"name": "tracer",
"cxx_class": "Trace::ExeTracer"
}
}
],
"num_work_ids": 16,
"work_item_id": -1,
"work_begin_cpu_id_exit": -1
},
"time_sync_period": 100000000000,
"eventq_index": 0,
"time_sync_spin_threshold": 100000000,
"cxx_class": "Root",
"path": "root",
"time_sync_enable": false,
"type": "Root",
"full_system": false
}