gem5/src/mem/cache/miss
Ron Dreslinski 6592045cbc Some fixes so that MSHR's are matched and we don't issue overlapping requests with detailed cpu
src/mem/cache/base_cache.cc:
    If we still have outstanding requests, need to schedule event again
src/mem/cache/miss/miss_queue.cc:
    Need to use block size so overlapping requests match in the MSHR's
src/mem/cache/miss/mshr.cc:
    Actually save the address, otherwise we can't match MSHR's

--HG--
extra : convert_revision : f0f018b89c2fb99f3ce8d6eafc0712ee8edeeda8
2006-07-10 17:16:15 -04:00
..
blocking_buffer.cc Fix the packet data allocation methods. Small fixes from changesets after my initial work. 2006-06-30 11:34:27 -04:00
blocking_buffer.hh More Changes, working towards cache.cc compiling. Headers cleaned up. 2006-06-28 17:28:33 -04:00
miss_queue.cc Some fixes so that MSHR's are matched and we don't issue overlapping requests with detailed cpu 2006-07-10 17:16:15 -04:00
miss_queue.hh More Changes, working towards cache.cc compiling. Headers cleaned up. 2006-06-28 17:28:33 -04:00
mshr.cc Some fixes so that MSHR's are matched and we don't issue overlapping requests with detailed cpu 2006-07-10 17:16:15 -04:00
mshr.hh Still missing prefetch and tags directories as well as cache builder. 2006-06-29 16:07:19 -04:00
mshr_queue.cc Still missing prefetch and tags directories as well as cache builder. 2006-06-29 16:07:19 -04:00
mshr_queue.hh More Changes, working towards cache.cc compiling. Headers cleaned up. 2006-06-28 17:28:33 -04:00