gem5/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.out
Gabe Black c240d4af84 The alpha twolf regression was really for tru64, not linux.
--HG--
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/config.ini => tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/config.out => tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.out
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/smred.out => tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.out
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/smred.pin => tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pin
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/smred.pl1 => tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pl1
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/smred.pl2 => tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pl2
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/smred.sav => tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.sav
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/smred.sv2 => tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.sv2
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/smred.twf => tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.twf
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/stderr => tests/long/70.twolf/ref/alpha/tru64/o3-timing/stderr
rename : tests/long/70.twolf/ref/alpha/linux/o3-timing/stdout => tests/long/70.twolf/ref/alpha/tru64/o3-timing/stdout
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/config.ini => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/config.out => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.out
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/m5stats.txt
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/smred.out => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.out
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/smred.pin => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/smred.pl1 => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/smred.pl2 => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/smred.sav => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/smred.sv2 => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/smred.twf => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/stderr => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stderr
rename : tests/long/70.twolf/ref/alpha/linux/simple-atomic/stdout => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stdout
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/config.ini => tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/config.out => tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.out
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/simple-timing/m5stats.txt
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/smred.out => tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.out
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/smred.pin => tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pin
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/smred.pl1 => tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/smred.pl2 => tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pl2
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/smred.sav => tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.sav
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/smred.sv2 => tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.sv2
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/smred.twf => tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.twf
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/stderr => tests/long/70.twolf/ref/alpha/tru64/simple-timing/stderr
rename : tests/long/70.twolf/ref/alpha/linux/simple-timing/stdout => tests/long/70.twolf/ref/alpha/tru64/simple-timing/stdout
extra : convert_revision : 55f9327662e0902925ca14b3260a86f7d211d445
2007-03-11 18:44:36 -04:00

201 lines
3.3 KiB
Text

[root]
type=Root
clock=1000000000000
max_tick=0
progress_interval=0
output_file=cout
[system.physmem]
type=PhysicalMemory
file=
range=[0,134217727]
latency=1
zero=false
[system]
type=System
physmem=system.physmem
mem_mode=atomic
[system.membus]
type=Bus
bus_id=0
clock=1000
width=64
responder_set=false
[system.cpu.workload]
type=LiveProcess
cmd=twolf smred
executable=/dist/m5/cpu2000/binaries/alpha/tru64/twolf
input=cin
output=cout
env=
cwd=build/ALPHA_SE/tests/fast/long/70.twolf/alpha/linux/simple-timing
system=system
uid=100
euid=100
gid=100
egid=100
pid=100
ppid=99
[system.cpu]
type=TimingSimpleCPU
max_insts_any_thread=0
max_insts_all_threads=0
max_loads_any_thread=0
max_loads_all_threads=0
progress_interval=0
system=system
cpu_id=0
workload=system.cpu.workload
clock=1
phase=0
defer_registration=false
// width not specified
function_trace=false
function_trace_start=0
// simulate_stalls not specified
[system.cpu.toL2Bus]
type=Bus
bus_id=0
clock=1000
width=64
responder_set=false
[system.cpu.icache]
type=BaseCache
size=131072
assoc=2
block_size=64
latency=1
mshrs=10
tgts_per_mshr=5
write_buffers=8
prioritizeRequests=false
protocol=null
trace_addr=0
hash_delay=1
repl=null
compressed_bus=false
store_compressed=false
adaptive_compression=false
compression_latency=0
block_size=64
max_miss_count=0
addr_range=[0,18446744073709551615]
split=false
split_size=0
lifo=false
two_queue=false
prefetch_miss=false
prefetch_access=false
prefetcher_size=100
prefetch_past_page=false
prefetch_serial_squash=false
prefetch_latency=10
prefetch_degree=1
prefetch_policy=none
prefetch_cache_check_push=true
prefetch_use_cpu_id=true
prefetch_data_accesses_only=false
hit_latency=1
[system.cpu.dcache]
type=BaseCache
size=262144
assoc=2
block_size=64
latency=1
mshrs=10
tgts_per_mshr=5
write_buffers=8
prioritizeRequests=false
protocol=null
trace_addr=0
hash_delay=1
repl=null
compressed_bus=false
store_compressed=false
adaptive_compression=false
compression_latency=0
block_size=64
max_miss_count=0
addr_range=[0,18446744073709551615]
split=false
split_size=0
lifo=false
two_queue=false
prefetch_miss=false
prefetch_access=false
prefetcher_size=100
prefetch_past_page=false
prefetch_serial_squash=false
prefetch_latency=10
prefetch_degree=1
prefetch_policy=none
prefetch_cache_check_push=true
prefetch_use_cpu_id=true
prefetch_data_accesses_only=false
hit_latency=1
[system.cpu.l2cache]
type=BaseCache
size=2097152
assoc=2
block_size=64
latency=1
mshrs=10
tgts_per_mshr=5
write_buffers=8
prioritizeRequests=false
protocol=null
trace_addr=0
hash_delay=1
repl=null
compressed_bus=false
store_compressed=false
adaptive_compression=false
compression_latency=0
block_size=64
max_miss_count=0
addr_range=[0,18446744073709551615]
split=false
split_size=0
lifo=false
two_queue=false
prefetch_miss=false
prefetch_access=false
prefetcher_size=100
prefetch_past_page=false
prefetch_serial_squash=false
prefetch_latency=10
prefetch_degree=1
prefetch_policy=none
prefetch_cache_check_push=true
prefetch_use_cpu_id=true
prefetch_data_accesses_only=false
hit_latency=1
[stats]
descriptions=true
project_name=test
simulation_name=test
simulation_sample=0
text_file=m5stats.txt
text_compat=true
mysql_db=
mysql_user=
mysql_password=
mysql_host=
events_start=-1
dump_reset=false
dump_cycle=0
dump_period=0
ignore_events=
[statsreset]
reset_cycle=0