gem5/src
Curtis Dunham 7f1603d207 arch: remove inline specifiers on all inst constrs, all ISAs
With (upcoming) separate compilation, they are useless.  Only
link-time optimization could re-inline them, but ideally
feedback-directed optimization would choose to do so only for
profitable (i.e. common) instructions.
2014-05-09 18:58:46 -04:00
..
arch arch: remove inline specifiers on all inst constrs, all ISAs 2014-05-09 18:58:46 -04:00
base base: explicitly suggest potential use of 'All' debug flags 2014-04-23 05:17:59 -04:00
cpu cpu: Fix setTranslateLatency() bug for squashed instructions 2014-04-23 05:18:26 -04:00
dev dev: Protect PollEvent processing when running in parallel mode 2014-04-09 16:01:43 +02:00
doc MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
doxygen MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
kern sim: Add openat/fstatat syscalls and fix mremap 2014-01-24 15:29:30 -06:00
mem mem: Don't print out the data of a cache block 2014-04-01 14:24:36 -05:00
proto mem: Edit proto Packet and enhance the python script 2014-03-07 15:56:23 -05:00
python scons: Require SWIG >= 2.0.4 and remove vector typemaps 2014-05-09 18:58:46 -04:00
sim sim: Use correct unit for abort message 2014-04-23 05:18:27 -04:00
unittest unittest: Fix build errors 2014-01-30 12:21:58 -06:00
Doxyfile Doxygen: Update the version of the Doxyfile 2012-10-11 06:38:42 -04:00
SConscript cpu: allow the fetch buffer to be smaller than a cache line 2013-11-15 13:21:15 -05:00