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Kevin Lim 61d95de4c8 Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version.
SConscript:
arch/isa_parser.py:
cpu/base_dyn_inst.cc:
    Remove OOO CPU stuff.
arch/alpha/faults.hh:
    Add fake memory fault.  This will be removed eventually.
arch/alpha/isa_desc:
    Change EA comp and Mem accessor to be const StaticInstPtrs.
cpu/base_dyn_inst.hh:
    Update read/write calls to use load queue and store queue indices.
cpu/beta_cpu/alpha_dyn_inst.hh:
    Change to const StaticInst in the register accessors.
cpu/beta_cpu/alpha_dyn_inst_impl.hh:
    Update syscall code with thread numbers.
cpu/beta_cpu/alpha_full_cpu.hh:
    Alter some of the full system code so it will compile without errors.
cpu/beta_cpu/alpha_full_cpu_builder.cc:
    Created a DerivAlphaFullCPU class so I can instantiate different CPUs that have different template parameters.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
    Update some of the full system code so it compiles.
cpu/beta_cpu/alpha_params.hh:
cpu/beta_cpu/fetch_impl.hh:
    Remove asid.
cpu/beta_cpu/comm.hh:
    Remove global history field.
cpu/beta_cpu/commit.hh:
    Comment out rename map.
cpu/beta_cpu/commit_impl.hh:
    Update some of the full system code so it compiles.  Also change it so that it handles memory instructions properly.
cpu/beta_cpu/cpu_policy.hh:
    Removed IQ from the IEW template parameter to make it more uniform.
cpu/beta_cpu/decode.hh:
    Add debug function.
cpu/beta_cpu/decode_impl.hh:
    Slight updates for decode in the case where it causes a squash.
cpu/beta_cpu/fetch.hh:
cpu/beta_cpu/rob.hh:
    Comment out unneccessary code.
cpu/beta_cpu/full_cpu.cc:
    Changed some of the full system code so it compiles.  Updated exec contexts and so forth to hopefully make multithreading easier.
cpu/beta_cpu/full_cpu.hh:
    Updated some of the full system code to make it compile.
cpu/beta_cpu/iew.cc:
    Removed IQ from template parameter to IEW.
cpu/beta_cpu/iew.hh:
    Removed IQ from template parameter to IEW. Updated IEW to recognize the Load/Store queue.
cpu/beta_cpu/iew_impl.hh:
    New handling of memory instructions through the Load/Store queue.
cpu/beta_cpu/inst_queue.hh:
    Updated comment.
cpu/beta_cpu/inst_queue_impl.hh:
    Slightly different handling of memory instructions due to Load/Store queue.
cpu/beta_cpu/regfile.hh:
    Updated full system code so it compiles.
cpu/beta_cpu/rob_impl.hh:
    Moved some code around; no major functional changes.
cpu/ooo_cpu/ooo_cpu.hh:
    Slight updates to OOO CPU; still does not work.
cpu/static_inst.hh:
    Remove OOO CPU stuff.  Change ea comp and mem acc to return const StaticInst.
kern/kernel_stats.hh:
    Extra forward declares added due to compile error.

--HG--
extra : convert_revision : 594a7cdbe57f6c2bda7d08856fcd864604a6238e
2005-05-03 10:56:47 -04:00
arch Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00
base Merge ktlim@zizzer.eecs.umich.edu:/bk/m5 2005-05-02 14:16:33 -04:00
build Merge ktlim@zizzer.eecs.umich.edu:/bk/m5 2005-03-28 14:40:02 -05:00
configs Cleanup rcS files. Make sure there are enough tracked connections. 2005-04-30 11:00:43 -04:00
cpu Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00
dev Add suport for no allocation of cache block on a dma read passing through a cache from the cpu-side interface 2005-04-29 21:01:43 -04:00
docs footer.html: 2003-10-15 20:49:12 -04:00
kern Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00
python Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00
sim Make code more portable and port to cygwin 2005-04-22 13:12:03 -04:00
test Mostly hacks for multiplying Frequency-type proxies by constants 2005-04-17 00:41:50 -04:00
util full_system isn't a useful parameter anymore, get rid of it. 2005-04-06 16:58:40 -04:00
Doxyfile Update for doxygen 1.3.6 2004-05-04 16:32:43 -04:00
LICENSE updated readme to reflect linux/scons changes 2004-07-28 17:56:36 -04:00
README updated readme to reflect linux/scons changes 2004-07-28 17:56:36 -04:00
SConscript Large update of several parts of my code. The most notable change is the inclusion of a full-fledged load/store queue. At the moment it still has some issues running, but most of the code is hopefully close to the final version. 2005-05-03 10:56:47 -04:00

This is release m5_1.0_beta1 of the M5 simulator.

This file contains brief "getting started" information and release
notes.  For more information, see http://m5.eecs.umich.edu.  If you
have questions, please send mail to m5sim-users@lists.sourceforge.net.

WHAT'S INCLUDED (AND NOT)
-------------------------

Since you're reading this file, presumably you've managed to untar the
distribution.  The archive you've unpacked has three subdirectories:
 - m5: the simulator itself
 - m5-test: regression tests and scripts to run them
 - ext: less-common external packages needed to build m5
   (currently ply and libelf)

M5 is a capable, full-system simulator that current supports both Linux
2.4/2.6 and the proprietary Compaq/HP Tru64 version of Unix. We are able 
to distribute Linux bootdisks, but we are unable to distribute bootable
disk images of Tru64 Unix. If you have a Tru64 license and are interested 
in obtaining disk images, contact us at m5-dev@eecs.umich.edu.

WHAT'S NEEDED
-------------
-GCC(3.X)
-Python(2.2.2+)

WHAT'S RECOMMENDED
------------------
-MySQL (for statistics complex statistics storage/retrieval)
-Python-MysqlDB (for statistics analysis) 

GETTING STARTED
---------------

The following steps will build and test the simulator.  The variable
"$top" refers to the top directory where you've unpacked the files,
i.e., the one containing the m5, m5-test, and ext directories.

There are three different build targets and three optimizations in each level:
Target:
-------
ALPHA  - Syscall emulation simulation
KERNEL - Linux full system simulation
KERNEL_TLASER - Tru64 Unix full system simulation

Optimization:
-------------
m5.debug - debug version of the code with tracing and without optimization
m5.opt   - optimized version of code with tracing
m5.fast  - optimized version of the code without tracing and asserts

cd $top/m5/build
scons TARGET/OPTLEVL  # e.g. KERNEL/m5.opt, use -j N if you have a MP system
cd $top/m5-test
./do-tests.pl -B ALPHA	# test what you just built
./do-tests.pl -B KERNEL	# test what you just built
# wait for tests to run...
# should end with "finished do-tests successfully!"