cf05fa476d
create an m5 package in python/m5
move the objects package into the m5 package
move the m5config into the m5 package as config
leave both importers outside of the package.
SConscript:
sim/main.cc:
move sim/pyconfig/* -> python
python/SConscript:
m5config.py -> m5/config.py (now automatically embedded)
objects -> python/m5/objects
embed all python files in python/m5
python/m5/config.py:
importer renamed mpy_importer
move code to m5/__init__.py
test/genini.py:
deal with new python organization
keep track of paths we want to add and add them after parameters
are parsed.
--HG--
rename : sim/pyconfig/SConscript => python/SConscript
rename : sim/pyconfig/m5config.py => python/m5/config.py
rename : objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.mpy
rename : objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.mpy
rename : objects/BadDevice.mpy => python/m5/objects/BadDevice.mpy
rename : objects/BaseCPU.mpy => python/m5/objects/BaseCPU.mpy
rename : objects/BaseCache.mpy => python/m5/objects/BaseCache.mpy
rename : objects/BaseSystem.mpy => python/m5/objects/BaseSystem.mpy
rename : objects/Bus.mpy => python/m5/objects/Bus.mpy
rename : objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.mpy
rename : objects/Device.mpy => python/m5/objects/Device.mpy
rename : objects/DiskImage.mpy => python/m5/objects/DiskImage.mpy
rename : objects/Ethernet.mpy => python/m5/objects/Ethernet.mpy
rename : objects/Ide.mpy => python/m5/objects/Ide.mpy
rename : objects/IntrControl.mpy => python/m5/objects/IntrControl.mpy
rename : objects/MemTest.mpy => python/m5/objects/MemTest.mpy
rename : objects/Pci.mpy => python/m5/objects/Pci.mpy
rename : objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.mpy
rename : objects/Platform.mpy => python/m5/objects/Platform.mpy
rename : objects/Process.mpy => python/m5/objects/Process.mpy
rename : objects/Repl.mpy => python/m5/objects/Repl.mpy
rename : objects/Root.mpy => python/m5/objects/Root.mpy
rename : objects/SimConsole.mpy => python/m5/objects/SimConsole.mpy
rename : objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.mpy
rename : objects/Tsunami.mpy => python/m5/objects/Tsunami.mpy
rename : objects/Uart.mpy => python/m5/objects/Uart.mpy
extra : convert_revision : aebf6ccda33028b1125974ca8b6aeab6f7570f30
18 lines
891 B
Text
18 lines
891 B
Text
simobj MemTest(SimObject):
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type = 'MemTest'
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cache = Param.BaseCache("L1 cache")
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check_mem = Param.FunctionalMemory("check memory")
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main_mem = Param.FunctionalMemory("hierarchical memory")
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max_loads = Param.Counter("number of loads to execute")
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memory_size = Param.Int(65536, "memory size")
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percent_copies = Param.Percent(0, "target copy percentage")
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percent_dest_unaligned = Param.Percent(50,
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"percent of copy dest address that are unaligned")
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percent_reads = Param.Percent(65, "target read percentage")
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percent_source_unaligned = Param.Percent(50,
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"percent of copy source address that are unaligned")
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percent_uncacheable = Param.Percent(10,
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"target uncacheable percentage")
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progress_interval = Param.Counter(1000000,
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"progress report interval (in accesses)")
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trace_addr = Param.Addr(0, "address to trace")
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