92de70b69a
This was done with an automated process, so there could be things that were done in this tree in the past that didn't make it. One known regression is that atomic memory operations do not seem to work properly anymore.
45 lines
1.6 KiB
C++
45 lines
1.6 KiB
C++
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struct ProcessorRequest {
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vector<CacheRequest*> cache_requests;
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};
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class ProcessorInterface {
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public:
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void read_atomic(const Address & paddr, void* data, int len) {
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assert(paddr.getLineAddress() + RubyConfig::dataBlockBytes() >= paddr + len);
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// for now, atomics can't span two blocks. Maybe fix this later
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}
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void read(const Address & paddr, const Address & rip, AccessModeType atype, void* data, const int len) {
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// create the CacheRequests
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ProcessorRequest* this_request = new ProcessorRequest;
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Address split_addr = paddr;
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int len_remaining = len;
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while (split_addr.getAddress() < paddr.getAddress() + len) {
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int split_len = (split_addr.getAddress() + len_remaining <= split_addr.getLineAddress() + RubyConfig::dataBlockBytes()) ?
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len_remaining :
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RubyConfig::dataBlockBytes() - split_addr.getOffset();
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CacheRequest creq = new CacheRequest( line_address(split_addr),
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split_addr,
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CacheRequestType_LD,
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rip,
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atype,
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split_len,
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PretchBit_No,
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laddr,
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0); // SMT thread id);
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this_request->cache_requests.push_back(creq);
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split_addr += split_len;
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len_remaining -= split_len;
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}
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outstanding_requests.push_back(this_request);
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}
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private:
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vector<ProcessorRequest*> outstanding_requests;
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Sequencer* m_sequencer;
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};
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