bb80f71f21
SConscript: comment out most devices add vport.cc arch/alpha/arguments.cc: arch/alpha/arguments.hh: push in alpha name space fix for new memory system arch/alpha/faults.cc: arch/alpha/faults.hh: Added an unimplemented fault that can be returned if a certain function isn't implemented arch/alpha/freebsd/system.cc: arch/alpha/linux/system.cc: arch/alpha/stacktrace.cc: arch/alpha/system.cc: arch/alpha/tlb.hh: arch/alpha/tru64/system.cc: fixed for new memory system arch/alpha/tlb.cc: fixed for new memory system removed code that seems to have no purpose arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: fixed for new memory system put in namespace AlphaISA base/remote_gdb.cc: fix for new memory system cpu/cpu_exec_context.cc: cpu/cpu_exec_context.hh: cpu/exec_context.hh: create two ports one of physical accesses and one for superpage accesses Add functions getVirtPort() getPhysPort() delVirtPort(). To get statically allocated physical or virtual ports or if an execcontext is passed in get a dynamically allocated virtual port dev/alpha_console.cc: dev/alpha_console.hh: Redo for new memory system dev/io_device.cc: dev/io_device.hh: new I/O devices for new memory system kern/linux/events.cc: kern/linux/printk.cc: kern/linux/printk.hh: kern/tru64/dump_mbuf.hh: kern/tru64/printf.cc: kern/tru64/printf.hh: Arguments now in namespaces kern/tru64/tru64_events.cc: mem/bus.cc: fix for new memory syste mem/physical.hh: new addressranges function getPort should be public mem/port.hh: Add write/read methods to functional port update getDeviceAddrRanges to have a list of both snoops and response lists sim/pseudo_inst.cc: sim/system.cc: sim/system.hh: Update for new mem system sim/vptr.hh: comment out code and replace with panics This will need to be fixed at some point, but it's not easy. --HG-- extra : convert_revision : 41f41f422cfbab3751284d55cccb6ea64a7956e2
285 lines
7.3 KiB
C++
285 lines
7.3 KiB
C++
/*
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <errno.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <cstdio>
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#include <string>
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#include "sim/pseudo_inst.hh"
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#include "arch/vtophys.hh"
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#include "cpu/base.hh"
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#include "cpu/sampler/sampler.hh"
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#include "cpu/exec_context.hh"
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#include "kern/kernel_stats.hh"
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#include "sim/param.hh"
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#include "sim/serialize.hh"
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#include "sim/sim_exit.hh"
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#include "sim/stat_control.hh"
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#include "sim/stats.hh"
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#include "sim/system.hh"
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#include "sim/debug.hh"
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#include "sim/vptr.hh"
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using namespace std;
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extern Sampler *SampCPU;
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using namespace Stats;
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using namespace TheISA;
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namespace AlphaPseudo
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{
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bool doStatisticsInsts;
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bool doCheckpointInsts;
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bool doQuiesce;
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void
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arm(ExecContext *xc)
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{
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xc->getCpuPtr()->kernelStats->arm();
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}
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void
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quiesce(ExecContext *xc)
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{
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if (!doQuiesce)
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return;
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xc->suspend();
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xc->getCpuPtr()->kernelStats->quiesce();
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}
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void
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quiesceNs(ExecContext *xc, uint64_t ns)
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{
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if (!doQuiesce || ns == 0)
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return;
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Event *quiesceEvent = xc->getQuiesceEvent();
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if (quiesceEvent->scheduled())
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quiesceEvent->reschedule(curTick + Clock::Int::ns * ns);
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else
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quiesceEvent->schedule(curTick + Clock::Int::ns * ns);
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xc->suspend();
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xc->getCpuPtr()->kernelStats->quiesce();
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}
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void
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quiesceCycles(ExecContext *xc, uint64_t cycles)
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{
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if (!doQuiesce || cycles == 0)
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return;
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Event *quiesceEvent = xc->getQuiesceEvent();
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if (quiesceEvent->scheduled())
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quiesceEvent->reschedule(curTick +
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xc->getCpuPtr()->cycles(cycles));
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else
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quiesceEvent->schedule(curTick +
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xc->getCpuPtr()->cycles(cycles));
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xc->suspend();
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xc->getCpuPtr()->kernelStats->quiesce();
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}
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uint64_t
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quiesceTime(ExecContext *xc)
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{
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return (xc->readLastActivate() - xc->readLastSuspend()) / Clock::Int::ns;
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}
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void
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ivlb(ExecContext *xc)
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{
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xc->getCpuPtr()->kernelStats->ivlb();
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}
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void
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ivle(ExecContext *xc)
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{
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}
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void
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m5exit_old(ExecContext *xc)
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{
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SimExit(curTick, "m5_exit_old instruction encountered");
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}
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void
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m5exit(ExecContext *xc, Tick delay)
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{
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Tick when = curTick + delay * Clock::Int::ns;
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SimExit(when, "m5_exit instruction encountered");
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}
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void
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resetstats(ExecContext *xc, Tick delay, Tick period)
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{
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if (!doStatisticsInsts)
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return;
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Tick when = curTick + delay * Clock::Int::ns;
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Tick repeat = period * Clock::Int::ns;
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using namespace Stats;
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SetupEvent(Reset, when, repeat);
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}
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void
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dumpstats(ExecContext *xc, Tick delay, Tick period)
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{
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if (!doStatisticsInsts)
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return;
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Tick when = curTick + delay * Clock::Int::ns;
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Tick repeat = period * Clock::Int::ns;
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using namespace Stats;
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SetupEvent(Dump, when, repeat);
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}
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void
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addsymbol(ExecContext *xc, Addr addr, Addr symbolAddr)
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{
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char symb[100];
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CopyStringOut(xc, symb, symbolAddr, 100);
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std::string symbol(symb);
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DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
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xc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
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}
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void
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dumpresetstats(ExecContext *xc, Tick delay, Tick period)
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{
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if (!doStatisticsInsts)
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return;
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Tick when = curTick + delay * Clock::Int::ns;
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Tick repeat = period * Clock::Int::ns;
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using namespace Stats;
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SetupEvent(Dump|Reset, when, repeat);
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}
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void
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m5checkpoint(ExecContext *xc, Tick delay, Tick period)
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{
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if (!doCheckpointInsts)
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return;
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Tick when = curTick + delay * Clock::Int::ns;
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Tick repeat = period * Clock::Int::ns;
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Checkpoint::setup(when, repeat);
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}
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uint64_t
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readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset)
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{
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const string &file = xc->getCpuPtr()->system->params()->readfile;
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if (file.empty()) {
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return ULL(0);
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}
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uint64_t result = 0;
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int fd = ::open(file.c_str(), O_RDONLY, 0);
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if (fd < 0)
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panic("could not open file %s\n", file);
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if (::lseek(fd, offset, SEEK_SET) < 0)
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panic("could not seek: %s", strerror(errno));
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char *buf = new char[len];
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char *p = buf;
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while (len > 0) {
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int bytes = ::read(fd, p, len);
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if (bytes <= 0)
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break;
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p += bytes;
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result += bytes;
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len -= bytes;
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}
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close(fd);
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CopyIn(xc, vaddr, buf, result);
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delete [] buf;
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return result;
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}
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class Context : public ParamContext
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{
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public:
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Context(const string §ion) : ParamContext(section) {}
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void checkParams();
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};
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Context context("pseudo_inst");
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Param<bool> __quiesce(&context, "quiesce",
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"enable quiesce instructions",
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true);
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Param<bool> __statistics(&context, "statistics",
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"enable statistics pseudo instructions",
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true);
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Param<bool> __checkpoint(&context, "checkpoint",
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"enable checkpoint pseudo instructions",
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true);
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void
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Context::checkParams()
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{
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doQuiesce = __quiesce;
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doStatisticsInsts = __statistics;
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doCheckpointInsts = __checkpoint;
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}
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void debugbreak(ExecContext *xc)
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{
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debug_break();
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}
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void switchcpu(ExecContext *xc)
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{
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if (SampCPU)
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SampCPU->switchCPUs();
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}
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}
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