367 lines
6.2 KiB
Text
367 lines
6.2 KiB
Text
[root]
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type=Root
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dummy=0
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[system.physmem]
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type=PhysicalMemory
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file=
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range=[0,134217727]
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latency=1
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zero=false
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[system]
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type=System
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physmem=system.physmem
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mem_mode=atomic
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[system.membus]
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type=Bus
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bus_id=0
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clock=1000
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width=64
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responder_set=false
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[system.cpu.workload]
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type=LiveProcess
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cmd=hello
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executable=tests/test-progs/hello/bin/alpha/linux/hello
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input=cin
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output=cout
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env=
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cwd=
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system=system
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uid=100
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euid=100
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gid=100
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egid=100
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pid=100
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ppid=99
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[system.cpu.fuPool.FUList0.opList0]
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type=OpDesc
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opClass=IntAlu
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opLat=1
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issueLat=1
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[system.cpu.fuPool.FUList0]
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type=FUDesc
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opList=system.cpu.fuPool.FUList0.opList0
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count=6
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[system.cpu.fuPool.FUList1.opList0]
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type=OpDesc
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opClass=IntMult
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opLat=3
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issueLat=1
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[system.cpu.fuPool.FUList1.opList1]
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type=OpDesc
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opClass=IntDiv
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opLat=20
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issueLat=19
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[system.cpu.fuPool.FUList1]
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type=FUDesc
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opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
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count=2
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[system.cpu.fuPool.FUList2.opList0]
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type=OpDesc
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opClass=FloatAdd
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opLat=2
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issueLat=1
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[system.cpu.fuPool.FUList2.opList1]
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type=OpDesc
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opClass=FloatCmp
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opLat=2
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issueLat=1
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[system.cpu.fuPool.FUList2.opList2]
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type=OpDesc
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opClass=FloatCvt
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opLat=2
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issueLat=1
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[system.cpu.fuPool.FUList2]
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type=FUDesc
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opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
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count=4
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[system.cpu.fuPool.FUList3.opList0]
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type=OpDesc
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opClass=FloatMult
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opLat=4
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issueLat=1
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[system.cpu.fuPool.FUList3.opList1]
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type=OpDesc
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opClass=FloatDiv
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opLat=12
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issueLat=12
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[system.cpu.fuPool.FUList3.opList2]
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type=OpDesc
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opClass=FloatSqrt
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opLat=24
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issueLat=24
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[system.cpu.fuPool.FUList3]
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type=FUDesc
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opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
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count=2
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[system.cpu.fuPool.FUList4.opList0]
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type=OpDesc
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opClass=MemRead
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opLat=1
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issueLat=1
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[system.cpu.fuPool.FUList4]
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type=FUDesc
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opList=system.cpu.fuPool.FUList4.opList0
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count=0
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[system.cpu.fuPool.FUList5.opList0]
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type=OpDesc
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opClass=MemWrite
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opLat=1
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issueLat=1
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[system.cpu.fuPool.FUList5]
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type=FUDesc
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opList=system.cpu.fuPool.FUList5.opList0
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count=0
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[system.cpu.fuPool.FUList6.opList0]
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type=OpDesc
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opClass=MemRead
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opLat=1
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issueLat=1
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[system.cpu.fuPool.FUList6.opList1]
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type=OpDesc
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opClass=MemWrite
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opLat=1
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issueLat=1
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[system.cpu.fuPool.FUList6]
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type=FUDesc
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opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
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count=4
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[system.cpu.fuPool.FUList7.opList0]
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type=OpDesc
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opClass=IprAccess
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opLat=3
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issueLat=3
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[system.cpu.fuPool.FUList7]
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type=FUDesc
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opList=system.cpu.fuPool.FUList7.opList0
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count=1
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[system.cpu.fuPool]
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type=FUPool
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FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7
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[system.cpu]
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type=DerivO3CPU
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clock=1
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phase=0
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numThreads=1
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cpu_id=0
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activity=0
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workload=system.cpu.workload
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checker=null
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max_insts_any_thread=0
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max_insts_all_threads=0
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max_loads_any_thread=0
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max_loads_all_threads=0
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progress_interval=0
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cachePorts=200
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decodeToFetchDelay=1
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renameToFetchDelay=1
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iewToFetchDelay=1
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commitToFetchDelay=1
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fetchWidth=8
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renameToDecodeDelay=1
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iewToDecodeDelay=1
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commitToDecodeDelay=1
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fetchToDecodeDelay=1
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decodeWidth=8
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iewToRenameDelay=1
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commitToRenameDelay=1
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decodeToRenameDelay=1
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renameWidth=8
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commitToIEWDelay=1
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renameToIEWDelay=2
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issueToExecuteDelay=1
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dispatchWidth=8
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issueWidth=8
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wbWidth=8
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wbDepth=1
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fuPool=system.cpu.fuPool
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iewToCommitDelay=1
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renameToROBDelay=1
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commitWidth=8
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squashWidth=8
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trapLatency=13
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backComSize=5
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forwardComSize=5
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predType=tournament
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localPredictorSize=2048
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localCtrBits=2
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localHistoryTableSize=2048
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localHistoryBits=11
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globalPredictorSize=8192
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globalCtrBits=2
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globalHistoryBits=13
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choicePredictorSize=8192
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choiceCtrBits=2
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BTBEntries=4096
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BTBTagSize=16
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RASSize=16
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LQEntries=32
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SQEntries=32
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LFSTSize=1024
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SSITSize=1024
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numPhysIntRegs=256
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numPhysFloatRegs=256
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numIQEntries=64
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numROBEntries=192
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smtNumFetchingThreads=1
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smtFetchPolicy=SingleThread
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smtLSQPolicy=Partitioned
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smtLSQThreshold=100
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smtIQPolicy=Partitioned
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smtIQThreshold=100
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smtROBPolicy=Partitioned
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smtROBThreshold=100
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smtCommitPolicy=RoundRobin
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instShiftAmt=2
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defer_registration=false
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function_trace=false
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function_trace_start=0
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[system.cpu.icache]
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type=BaseCache
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size=131072
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assoc=2
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block_size=64
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latency=1
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mshrs=10
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tgts_per_mshr=5
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write_buffers=8
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prioritizeRequests=false
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protocol=null
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trace_addr=0
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hash_delay=1
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repl=null
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compressed_bus=false
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store_compressed=false
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adaptive_compression=false
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compression_latency=0
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block_size=64
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max_miss_count=0
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addr_range=[0,18446744073709551615]
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split=false
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split_size=0
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lifo=false
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two_queue=false
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prefetch_miss=false
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prefetch_access=false
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prefetcher_size=100
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prefetch_past_page=false
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prefetch_serial_squash=false
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prefetch_latency=10
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prefetch_degree=1
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prefetch_policy=none
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prefetch_cache_check_push=true
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prefetch_use_cpu_id=true
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prefetch_data_accesses_only=false
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hit_latency=1
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[system.cpu.dcache]
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type=BaseCache
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size=262144
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assoc=2
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block_size=64
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latency=1
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mshrs=10
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tgts_per_mshr=5
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write_buffers=8
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prioritizeRequests=false
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protocol=null
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trace_addr=0
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hash_delay=1
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repl=null
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compressed_bus=false
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store_compressed=false
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adaptive_compression=false
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compression_latency=0
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block_size=64
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max_miss_count=0
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addr_range=[0,18446744073709551615]
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split=false
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split_size=0
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lifo=false
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two_queue=false
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prefetch_miss=false
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prefetch_access=false
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prefetcher_size=100
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prefetch_past_page=false
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prefetch_serial_squash=false
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prefetch_latency=10
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prefetch_degree=1
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prefetch_policy=none
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prefetch_cache_check_push=true
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prefetch_use_cpu_id=true
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prefetch_data_accesses_only=false
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hit_latency=1
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[system.cpu.l2cache]
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type=BaseCache
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size=2097152
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assoc=2
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block_size=64
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latency=1
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mshrs=10
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tgts_per_mshr=5
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write_buffers=8
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prioritizeRequests=false
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protocol=null
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trace_addr=0
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hash_delay=1
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repl=null
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compressed_bus=false
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store_compressed=false
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adaptive_compression=false
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compression_latency=0
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block_size=64
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max_miss_count=0
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addr_range=[0,18446744073709551615]
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split=false
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split_size=0
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lifo=false
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two_queue=false
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prefetch_miss=false
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prefetch_access=false
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prefetcher_size=100
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prefetch_past_page=false
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prefetch_serial_squash=false
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prefetch_latency=10
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prefetch_degree=1
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prefetch_policy=none
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prefetch_cache_check_push=true
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prefetch_use_cpu_id=true
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prefetch_data_accesses_only=false
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hit_latency=1
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[system.cpu.toL2Bus]
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type=Bus
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bus_id=0
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clock=1000
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width=64
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responder_set=false
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