6240f8c4bc
ALPHA_FS finally compiles again SConscript: Use a couple more FS sources, still don't compile that much arch/alpha/faults.hh: the unimp fault should probably exist in nonfs too. dev/alpha_console.cc: dev/alpha_console.hh: dev/simconsole.cc: dev/simple_disk.cc: dev/simple_disk.hh: dev/uart.cc: dev/uart.hh: dev/uart8250.cc: dev/uart8250.hh: sim/process.cc: sim/system.cc: fixes for newmem dev/io_device.hh: a system pointer is probably useful for every device to have mem/bus.hh: mem/physical.cc: new address ranges function python/m5/objects/SimpleDisk.py: simple disk now has a system pointer rather than physmem directly --HG-- extra : convert_revision : d8c0a5c6510a6210aec5e8adfb0a4a06ec0dcebf
372 lines
9.1 KiB
C++
372 lines
9.1 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ALPHA_FAULTS_HH__
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#define __ALPHA_FAULTS_HH__
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#include "arch/alpha/isa_traits.hh"
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#include "sim/faults.hh"
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// The design of the "name" and "vect" functions is in sim/faults.hh
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namespace AlphaISA
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{
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typedef const Addr FaultVect;
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class AlphaFault : public FaultBase
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{
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protected:
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virtual bool skipFaultingInstruction() {return false;}
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virtual bool setRestartAddress() {return true;}
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public:
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#if FULL_SYSTEM
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void invoke(ExecContext * xc);
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#endif
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virtual FaultVect vect() = 0;
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virtual FaultStat & countStat() = 0;
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};
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class MachineCheckFault : public AlphaFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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bool isMachineCheckFault() {return true;}
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};
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class AlignmentFault : public AlphaFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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bool isAlignmentFault() {return true;}
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};
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static inline Fault genMachineCheckFault()
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{
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return new MachineCheckFault;
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}
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static inline Fault genAlignmentFault()
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{
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return new AlignmentFault;
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}
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class ResetFault : public AlphaFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class ArithmeticFault : public AlphaFault
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{
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protected:
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bool skipFaultingInstruction() {return true;}
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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#if FULL_SYSTEM
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void invoke(ExecContext * xc);
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#endif
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};
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class InterruptFault : public AlphaFault
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{
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protected:
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bool setRestartAddress() {return false;}
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class DtbFault : public AlphaFault
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{
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#if FULL_SYSTEM
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private:
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AlphaISA::VAddr vaddr;
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uint32_t reqFlags;
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uint64_t flags;
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public:
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DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags)
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: vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
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{ }
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#endif
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FaultName name() = 0;
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FaultVect vect() = 0;
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FaultStat & countStat() = 0;
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#if FULL_SYSTEM
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void invoke(ExecContext * xc);
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#endif
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};
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class NDtbMissFault : public DtbFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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#if FULL_SYSTEM
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NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
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: DtbFault(vaddr, reqFlags, flags)
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{ }
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#endif
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class PDtbMissFault : public DtbFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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#if FULL_SYSTEM
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PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
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: DtbFault(vaddr, reqFlags, flags)
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{ }
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#endif
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class DtbPageFault : public DtbFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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#if FULL_SYSTEM
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DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
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: DtbFault(vaddr, reqFlags, flags)
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{ }
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#endif
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class DtbAcvFault : public DtbFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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#if FULL_SYSTEM
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DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
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: DtbFault(vaddr, reqFlags, flags)
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{ }
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#endif
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class DtbAlignmentFault : public DtbFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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#if FULL_SYSTEM
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DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
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: DtbFault(vaddr, reqFlags, flags)
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{ }
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#endif
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class ItbFault : public AlphaFault
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{
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private:
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Addr pc;
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public:
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ItbFault(Addr _pc)
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: pc(_pc)
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{ }
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FaultName name() = 0;
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FaultVect vect() = 0;
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FaultStat & countStat() = 0;
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#if FULL_SYSTEM
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void invoke(ExecContext * xc);
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#endif
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};
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class ItbMissFault : public ItbFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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ItbMissFault(Addr pc)
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: ItbFault(pc)
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{ }
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class ItbPageFault : public ItbFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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ItbPageFault(Addr pc)
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: ItbFault(pc)
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{ }
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class ItbAcvFault : public ItbFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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ItbAcvFault(Addr pc)
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: ItbFault(pc)
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{ }
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class UnimplementedOpcodeFault : public AlphaFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class FloatEnableFault : public AlphaFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class PalFault : public AlphaFault
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{
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protected:
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bool skipFaultingInstruction() {return true;}
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class IntegerOverflowFault : public AlphaFault
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{
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private:
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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};
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class UnimpFault : public AlphaFault
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{
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private:
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std::string panicStr;
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static FaultName _name;
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static FaultVect _vect;
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static FaultStat _count;
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public:
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UnimpFault(std::string _str)
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: panicStr(_str)
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{ }
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FaultName name() {return _name;}
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FaultVect vect() {return _vect;}
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FaultStat & countStat() {return _count;}
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#if FULL_SYSTEM
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void invoke(ExecContext * xc);
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#endif
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};
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} // AlphaISA namespace
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#endif // __FAULTS_HH__
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