a4ed65d0fa
Debug FP instructions to handle these FP insts
arch/mips/isa/bitfields.isa:
add Bitfield for Floating Point Condition Codes
arch/mips/isa/decoder.isa:
Follow instruction naming style with FP single insts
Send the float value to the convert&round functions in single FP
add ll inst support
add 'token' sc support
arch/mips/isa_traits.cc:
Add SINGLE->WORD, WORD->SINGLE, & WORD->DOUBLE conversions
arch/mips/regfile.hh:
update header files
arch/mips/regfile/float_regfile.hh:
Add more FP registers
--HG--
rename : arch/mips/int_regfile.hh => arch/mips/regfile/int_regfile.hh
rename : arch/mips/misc_regfile.hh => arch/mips/regfile/misc_regfile.hh
extra : convert_revision : 92faf0bfd8542ade762ac569ec158d198f6a9c7e
255 lines
7 KiB
C++
255 lines
7 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "arch/mips/isa_traits.hh"
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#include "config/full_system.hh"
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#include "cpu/static_inst.hh"
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#include "sim/serialize.hh"
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#include "base/bitfield.hh"
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using namespace MipsISA;
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using namespace std;
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void
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MipsISA::copyRegs(ExecContext *src, ExecContext *dest)
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{
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/*fpcr = xc->readMiscReg(MipsISA::Fpcr_DepTag);
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uniq = xc->readMiscReg(MipsISA::Uniq_DepTag);
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lock_flag = xc->readMiscReg(MipsISA::Lock_Flag_DepTag);
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lock_addr = xc->readMiscReg(MipsISA::Lock_Addr_DepTag);
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#if FULL_SYSTEM
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copyIprs(xc);
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#endif*/
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}
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void
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MipsISA::MiscRegFile::copyMiscRegs(ExecContext *xc)
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{
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/*fpcr = xc->readMiscReg(MipsISA::Fpcr_DepTag);
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uniq = xc->readMiscReg(MipsISA::Uniq_DepTag);
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lock_flag = xc->readMiscReg(MipsISA::Lock_Flag_DepTag);
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lock_addr = xc->readMiscReg(MipsISA::Lock_Addr_DepTag);
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#endif*/
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}
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uint64_t
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MipsISA::convert_and_round(uint32_t fp_val, ConvertType cvt_type, int rnd_mode)
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{
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uint64_t ret_val = 0;
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switch (cvt_type)
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{
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case SINGLE_TO_DOUBLE:
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uint64_t single_sign = fp_val & 0x80000000;
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uint64_t single_exp = (fp_val & 0x7F800000) >> 22;
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single_exp -= 127;
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uint64_t single_mantissa = fp_val & 0x007FFFFF;
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uint64_t double_exp = single_exp + 1023;
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double_exp = double_exp << 51;
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uint64_t double_val = single_sign << 63 | double_exp | single_mantissa;
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return double_val;
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default:
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panic("Invalid Floating Point Conversion Type (%d) being used.\n",cvt_type);
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return ret_val;
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}
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}
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uint64_t
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MipsISA::convert_and_round(uint64_t fp_val, ConvertType cvt_type, int rnd_mode)
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{
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uint64_t ret_val = 0;
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switch (cvt_type)
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{
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case SINGLE_TO_DOUBLE:
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uint64_t single_sign = fp_val & 0x80000000;
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uint64_t single_exp = (fp_val & 0x7F800000) >> 22;
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single_exp -= 127;
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uint64_t single_mantissa = fp_val & 0x007FFFFF;
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uint64_t double_exp = single_exp + 1023;
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double_exp = double_exp << 51;
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uint64_t double_val = single_sign << 63 | double_exp | single_mantissa;
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return double_val;
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default:
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panic("Invalid Floating Point Conversion Type (%d) being used.\n",cvt_type);
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return ret_val;
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}
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}
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uint64_t
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MipsISA::convert_and_round(double fp_val, ConvertType cvt_type, int rnd_mode)
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{
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switch (cvt_type)
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{
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case SINGLE_TO_DOUBLE:
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double sdouble_val = fp_val;
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void *sdouble_ptr = &sdouble_val;
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uint64_t sdp_bits = *(uint64_t *) sdouble_ptr ;
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return sdp_bits;
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case SINGLE_TO_WORD:
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int32_t sword_val = (int32_t) fp_val;
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void *sword_ptr = &sword_val;
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uint64_t sword_bits= *(uint32_t *) sword_ptr ;
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return sword_bits;
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case WORD_TO_SINGLE:
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float wfloat_val = fp_val;
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void *wfloat_ptr = &wfloat_val;
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uint64_t wfloat_bits = *(uint32_t *) wfloat_ptr ;
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return wfloat_bits;
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case WORD_TO_DOUBLE:
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double wdouble_val = fp_val;
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void *wdouble_ptr = &wdouble_val;
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uint64_t wdp_bits = *(uint64_t *) wdouble_ptr ;
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return wdp_bits;
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default:
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panic("Invalid Floating Point Conversion Type (%d). See types.hh for Conversion List\n",cvt_type);
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return 0;
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}
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}
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#if FULL_SYSTEM
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static inline Addr
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TruncPage(Addr addr)
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{ return addr & ~(MipsISA::PageBytes - 1); }
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static inline Addr
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RoundPage(Addr addr)
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{ return (addr + MipsISA::PageBytes - 1) & ~(MipsISA::PageBytes - 1); }
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#endif
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void
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IntRegFile::serialize(std::ostream &os)
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{
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SERIALIZE_ARRAY(regs, NumIntRegs);
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}
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void
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IntRegFile::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_ARRAY(regs, NumIntRegs);
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}
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void
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RegFile::serialize(std::ostream &os)
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{
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intRegFile.serialize(os);
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//SERIALIZE_ARRAY(floatRegFile.q, NumFloatRegs);
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//SERIALIZE_SCALAR(miscRegs.fpcr);
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//SERIALIZE_SCALAR(miscRegs.uniq);
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//SERIALIZE_SCALAR(miscRegs.lock_flag);
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//SERIALIZE_SCALAR(miscRegs.lock_addr);
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SERIALIZE_SCALAR(pc);
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SERIALIZE_SCALAR(npc);
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SERIALIZE_SCALAR(nnpc);
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#if FULL_SYSTEM
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SERIALIZE_ARRAY(palregs, NumIntRegs);
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SERIALIZE_ARRAY(ipr, NumInternalProcRegs);
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SERIALIZE_SCALAR(intrflag);
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SERIALIZE_SCALAR(pal_shadow);
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#endif
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}
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void
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RegFile::unserialize(Checkpoint *cp, const std::string §ion)
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{
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intRegFile.unserialize(cp, section);
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//UNSERIALIZE_ARRAY(floatRegFile.q, NumFloatRegs);
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//UNSERIALIZE_SCALAR(miscRegs.fpcr);
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//UNSERIALIZE_SCALAR(miscRegs.uniq);
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//UNSERIALIZE_SCALAR(miscRegs.lock_flag);
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//UNSERIALIZE_SCALAR(miscRegs.lock_addr);
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UNSERIALIZE_SCALAR(pc);
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UNSERIALIZE_SCALAR(npc);
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UNSERIALIZE_SCALAR(nnpc);
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#if FULL_SYSTEM
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UNSERIALIZE_ARRAY(palregs, NumIntRegs);
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UNSERIALIZE_ARRAY(ipr, NumInternalProcRegs);
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UNSERIALIZE_SCALAR(intrflag);
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UNSERIALIZE_SCALAR(pal_shadow);
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#endif
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}
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#if FULL_SYSTEM
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void
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PTE::serialize(std::ostream &os)
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{
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SERIALIZE_SCALAR(tag);
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SERIALIZE_SCALAR(ppn);
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SERIALIZE_SCALAR(xre);
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SERIALIZE_SCALAR(xwe);
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SERIALIZE_SCALAR(asn);
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SERIALIZE_SCALAR(asma);
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SERIALIZE_SCALAR(fonr);
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SERIALIZE_SCALAR(fonw);
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SERIALIZE_SCALAR(valid);
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}
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void
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PTE::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_SCALAR(tag);
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UNSERIALIZE_SCALAR(ppn);
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UNSERIALIZE_SCALAR(xre);
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UNSERIALIZE_SCALAR(xwe);
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UNSERIALIZE_SCALAR(asn);
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UNSERIALIZE_SCALAR(asma);
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UNSERIALIZE_SCALAR(fonr);
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UNSERIALIZE_SCALAR(fonw);
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UNSERIALIZE_SCALAR(valid);
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}
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#endif //FULL_SYSTEM
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