gem5/arch
Kevin Lim 5790e295a9 Merge ktlim@zizzer:/bk/m5
into  zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs

arch/alpha/ev5.cc:
    Remove intr_post, it is no longer used.
arch/alpha/isa_traits.hh:
    Hand merge.

--HG--
extra : convert_revision : 94f14539a9e5646f8c368b15b2dff18ab2f492cf
2006-03-04 13:06:24 -05:00
..
alpha Merge ktlim@zizzer:/bk/m5 2006-03-04 13:06:24 -05:00
mips Filled out the object file loader so it can load object files for several OSs and architectures. 2006-03-04 03:09:23 -05:00
sparc General small SPARC fixups 2006-03-04 03:16:16 -05:00
isa_parser.py Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
isa_specific.hh Auto-generate arch/foo.hh "switch headers" in scons. 2006-02-22 22:22:06 -05:00
SConscript Filled out the object file loader so it can load object files for several OSs and architectures. 2006-03-04 03:09:23 -05:00