32daf6fc3f
This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
79 lines
2.3 KiB
C++
79 lines
2.3 KiB
C++
/*
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* Copyright (c) 2009 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/arm/isa.hh"
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#include "cpu/thread_context.hh"
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namespace ArmISA
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{
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void
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ISA::clear()
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{
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miscRegFile.clear();
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}
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MiscReg
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ISA::readMiscRegNoEffect(int miscReg)
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{
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return miscRegFile.readRegNoEffect(miscReg);
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}
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MiscReg
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ISA::readMiscReg(int miscReg, ThreadContext *tc)
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{
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return miscRegFile.readReg(miscReg, tc);
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}
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void
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ISA::setMiscRegNoEffect(int miscReg, const MiscReg val)
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{
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miscRegFile.setRegNoEffect(miscReg, val);
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}
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void
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ISA::setMiscReg(int miscReg, const MiscReg val, ThreadContext *tc)
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{
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miscRegFile.setReg(miscReg, val, tc);
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}
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void
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ISA::serialize(std::ostream &os)
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{
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//miscRegFile.serialize(os);
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}
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void
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ISA::unserialize(Checkpoint *cp, const std::string §ion)
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{
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//miscRegFile.unserialize(cp, section);
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}
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}
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