gem5/util/tlm/examples/slave_port/run_gem5.sh
Christian Menard b25ea094d4 misc: Clean up and complete the gem5<->SystemC-TLM bridge [1/10]
The current TLM bridge only provides a Slave Port that allows the gem5
world to send request to the SystemC world. This patch series refractors
and cleans up the existing code, and adds a Master Port that allows the
SystemC world to send requests to the gem5 world.

This patch:
 * Restructure the existing sources in preparation of the addition of the
 * new
   Master Port.
 * Refractor names to allow for distinction of the slave and master port.
 * Replace the Makefile by a SConstruct.

Testing Done: The examples provided in util/tlm (now
util/tlm/examples/slave_port) still compile and run error free.

Reviewed at http://reviews.gem5.org/r/3527/

Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09 19:15:30 -05:00

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#!/bin/bash
# Copyright (c) 2015, University of Kaiserslautern
# All rights reserved.
#
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# modification, are permitted provided that the following conditions are
# met:
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# this list of conditions and the following disclaimer.
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# documentation and/or other materials provided with the distribution.
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# this software without specific prior written permission.
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Matthias Jung
# Color Definition:
RCol='\e[0m'; # Text Reset
BGre='\e[1;31m';
echo -e "\n${BGre}Create gem5 Configuration${RCol}\n"
../../../../build/ARM/gem5.opt ../../../../configs/example/fs.py \
--tlm-memory=memory \
--cpu-type=timing \
--num-cpu=1 \
--mem-type=SimpleMemory \
--mem-size=512MB \
--mem-channels=1 \
--caches --l2cache \
--machine-type=VExpress_EMM \
--dtb-filename=vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb \
--kernel=vmlinux.aarch32.ll_20131205.0-gem5
echo -e "\n${BGre}Run gem5 ${RCol}\n"
time ./gem5.opt.sc m5out/config.ini -o 2147483648