Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. --HG-- rename : src/python/m5/convert.py => src/python/m5/util/convert.py rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
304 lines
10 KiB
Python
304 lines
10 KiB
Python
# Copyright (c) 2006-2007 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Ron Dreslinski
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# Simple test script
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#
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# "m5 test.py"
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import os
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import optparse
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import sys
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import m5
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from m5.objects import *
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m5.util.addToPath('../common')
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# --------------------
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# Define Command Line Options
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# ====================
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parser = optparse.OptionParser()
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parser.add_option("-d", "--detailed", action="store_true")
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parser.add_option("-t", "--timing", action="store_true")
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parser.add_option("-m", "--maxtick", type="int")
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parser.add_option("-c", "--numclusters",
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help="Number of clusters", type="int")
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parser.add_option("-n", "--numcpus",
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help="Number of cpus in total", type="int")
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parser.add_option("-f", "--frequency",
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default = "1GHz",
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help="Frequency of each CPU")
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parser.add_option("--l1size",
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default = "32kB")
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parser.add_option("--l1latency",
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default = 1)
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parser.add_option("--l2size",
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default = "256kB")
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parser.add_option("--l2latency",
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default = 10)
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parser.add_option("--rootdir",
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help="ROot directory of Splash2",
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default="/dist/splash2/codes/")
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parser.add_option("-b", "--benchmark",
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help="Splash 2 benchmark to run")
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(options, args) = parser.parse_args()
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if args:
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print "Error: script doesn't take any positional arguments"
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sys.exit(1)
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# --------------------
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# Define Splash2 Benchmarks
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# ====================
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class Cholesky(LiveProcess):
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executable = options.rootdir + '/kernels/cholesky/CHOLESKY'
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cmd = 'CHOLESKY -p' + str(options.numcpus) + ' '\
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+ options.rootdir + '/kernels/cholesky/inputs/tk23.O'
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class FFT(LiveProcess):
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executable = options.rootdir + 'kernels/fft/FFT'
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cmd = 'FFT -p' + str(options.numcpus) + ' -m18'
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class LU_contig(LiveProcess):
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executable = options.rootdir + 'kernels/lu/contiguous_blocks/LU'
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cmd = 'LU -p' + str(options.numcpus)
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class LU_noncontig(LiveProcess):
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executable = options.rootdir + 'kernels/lu/non_contiguous_blocks/LU'
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cmd = 'LU -p' + str(options.numcpus)
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class Radix(LiveProcess):
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executable = options.rootdir + 'kernels/radix/RADIX'
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cmd = 'RADIX -n524288 -p' + str(options.numcpus)
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class Barnes(LiveProcess):
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executable = options.rootdir + 'apps/barnes/BARNES'
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cmd = 'BARNES'
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input = options.rootdir + 'apps/barnes/input.p' + str(options.numcpus)
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class FMM(LiveProcess):
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executable = options.rootdir + 'apps/fmm/FMM'
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cmd = 'FMM'
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input = options.rootdir + 'apps/fmm/inputs/input.2048.p' + str(options.numcpus)
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class Ocean_contig(LiveProcess):
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executable = options.rootdir + 'apps/ocean/contiguous_partitions/OCEAN'
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cmd = 'OCEAN -p' + str(options.numcpus)
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class Ocean_noncontig(LiveProcess):
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executable = options.rootdir + 'apps/ocean/non_contiguous_partitions/OCEAN'
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cmd = 'OCEAN -p' + str(options.numcpus)
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class Raytrace(LiveProcess):
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executable = options.rootdir + 'apps/raytrace/RAYTRACE'
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cmd = 'RAYTRACE -p' + str(options.numcpus) + ' ' \
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+ options.rootdir + 'apps/raytrace/inputs/teapot.env'
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class Water_nsquared(LiveProcess):
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executable = options.rootdir + 'apps/water-nsquared/WATER-NSQUARED'
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cmd = 'WATER-NSQUARED'
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input = options.rootdir + 'apps/water-nsquared/input.p' + str(options.numcpus)
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class Water_spatial(LiveProcess):
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executable = options.rootdir + 'apps/water-spatial/WATER-SPATIAL'
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cmd = 'WATER-SPATIAL'
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input = options.rootdir + 'apps/water-spatial/input.p' + str(options.numcpus)
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# --------------------
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# Base L1 Cache Definition
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# ====================
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class L1(BaseCache):
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latency = options.l1latency
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block_size = 64
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mshrs = 12
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tgts_per_mshr = 8
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# ----------------------
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# Base L2 Cache Definition
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# ----------------------
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class L2(BaseCache):
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block_size = 64
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latency = options.l2latency
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mshrs = 92
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tgts_per_mshr = 16
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write_buffers = 8
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# ----------------------
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# Define the clusters with their cpus
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# ----------------------
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class Cluster:
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pass
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cpusPerCluster = options.numcpus/options.numclusters
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busFrequency = Frequency(options.frequency)
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busFrequency *= cpusPerCluster
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all_cpus = []
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all_l1s = []
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all_l1buses = []
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if options.timing:
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clusters = [ Cluster() for i in xrange(options.numclusters)]
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for j in xrange(options.numclusters):
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clusters[j].id = j
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for cluster in clusters:
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cluster.clusterbus = Bus(clock=busFrequency)
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all_l1buses += [cluster.clusterbus]
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cluster.cpus = [TimingSimpleCPU(cpu_id = i + cluster.id,
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clock=options.frequency)
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for i in xrange(cpusPerCluster)]
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all_cpus += cluster.cpus
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cluster.l1 = L1(size=options.l1size, assoc = 4)
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all_l1s += [cluster.l1]
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elif options.detailed:
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clusters = [ Cluster() for i in xrange(options.numclusters)]
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for j in xrange(options.numclusters):
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clusters[j].id = j
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for cluster in clusters:
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cluster.clusterbus = Bus(clock=busFrequency)
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all_l1buses += [cluster.clusterbus]
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cluster.cpus = [DerivO3CPU(cpu_id = i + cluster.id,
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clock=options.frequency)
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for i in xrange(cpusPerCluster)]
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all_cpus += cluster.cpus
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cluster.l1 = L1(size=options.l1size, assoc = 4)
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all_l1s += [cluster.l1]
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else:
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clusters = [ Cluster() for i in xrange(options.numclusters)]
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for j in xrange(options.numclusters):
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clusters[j].id = j
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for cluster in clusters:
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cluster.clusterbus = Bus(clock=busFrequency)
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all_l1buses += [cluster.clusterbus]
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cluster.cpus = [AtomicSimpleCPU(cpu_id = i + cluster.id,
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clock=options.frequency)
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for i in xrange(cpusPerCluster)]
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all_cpus += cluster.cpus
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cluster.l1 = L1(size=options.l1size, assoc = 4)
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all_l1s += [cluster.l1]
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# ----------------------
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# Create a system, and add system wide objects
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# ----------------------
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system = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses, physmem = PhysicalMemory(),
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membus = Bus(clock = busFrequency))
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system.toL2bus = Bus(clock = busFrequency)
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system.l2 = L2(size = options.l2size, assoc = 8)
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# ----------------------
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# Connect the L2 cache and memory together
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# ----------------------
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system.physmem.port = system.membus.port
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system.l2.cpu_side = system.toL2bus.port
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system.l2.mem_side = system.membus.port
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# ----------------------
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# Connect the L2 cache and clusters together
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# ----------------------
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for cluster in clusters:
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cluster.l1.cpu_side = cluster.clusterbus.port
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cluster.l1.mem_side = system.toL2bus.port
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for cpu in cluster.cpus:
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cpu.icache_port = cluster.clusterbus.port
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cpu.dcache_port = cluster.clusterbus.port
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cpu.mem = cluster.l1
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# ----------------------
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# Define the root
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# ----------------------
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root = Root(system = system)
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# --------------------
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# Pick the correct Splash2 Benchmarks
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# ====================
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if options.benchmark == 'Cholesky':
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root.workload = Cholesky()
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elif options.benchmark == 'FFT':
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root.workload = FFT()
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elif options.benchmark == 'LUContig':
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root.workload = LU_contig()
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elif options.benchmark == 'LUNoncontig':
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root.workload = LU_noncontig()
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elif options.benchmark == 'Radix':
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root.workload = Radix()
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elif options.benchmark == 'Barnes':
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root.workload = Barnes()
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elif options.benchmark == 'FMM':
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root.workload = FMM()
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elif options.benchmark == 'OceanContig':
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root.workload = Ocean_contig()
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elif options.benchmark == 'OceanNoncontig':
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root.workload = Ocean_noncontig()
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elif options.benchmark == 'Raytrace':
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root.workload = Raytrace()
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elif options.benchmark == 'WaterNSquared':
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root.workload = Water_nsquared()
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elif options.benchmark == 'WaterSpatial':
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root.workload = Water_spatial()
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else:
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m5.util.panic("""
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The --benchmark environment variable was set to something improper.
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Use Cholesky, FFT, LUContig, LUNoncontig, Radix, Barnes, FMM, OceanContig,
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OceanNoncontig, Raytrace, WaterNSquared, or WaterSpatial
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""")
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# --------------------
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# Assign the workload to the cpus
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# ====================
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for cluster in clusters:
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for cpu in cluster.cpus:
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cpu.workload = root.workload
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# ----------------------
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# Run the simulation
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# ----------------------
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if options.timing or options.detailed:
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root.system.mem_mode = 'timing'
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# instantiate configuration
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m5.instantiate(root)
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# simulate until program terminates
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if options.maxtick:
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exit_event = m5.simulate(options.maxtick)
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else:
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exit_event = m5.simulate(m5.MaxTick)
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print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
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