gem5/base/trace.hh
Steve Reinhardt 25693e9e69 Make include paths explicit and update makefile accordingly.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/fake_syscall.cc:
arch/alpha/faults.cc:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/circlebuf.cc:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/cprintf.cc:
base/cprintf.hh:
base/fast_alloc.cc:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/exec_aout.h:
base/loader/exec_ecoff.h:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/misc.cc:
base/misc.hh:
base/pollevent.cc:
base/pollevent.hh:
base/random.cc:
base/random.hh:
base/range.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/prog.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/sim_time.cc:
sim/system.cc:
sim/system.hh:
sim/universe.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/tap/tap.cc:
    Make include paths explicit.

--HG--
extra : convert_revision : 941cbdc591fd4d3d1d9f095cd58fc23dd2d73840
2003-10-10 11:09:00 -07:00

218 lines
5.6 KiB
C++

/*
* Copyright (c) 2003 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __TRACE_HH__
#define __TRACE_HH__
#include <vector>
#include "base/cprintf.hh"
#include "sim/host.hh"
#include "sim/universe.hh"
#ifndef TRACING_ON
#ifdef DEBUG
#define TRACING_ON 1
#else
#define TRACING_ON 0
#endif
#endif
#include "base/trace_flags.hh"
namespace Trace {
typedef std::vector<bool> FlagVec;
extern FlagVec flags;
#if TRACING_ON
const bool On = true;
#else
const bool On = false;
#endif
inline bool
IsOn(int t)
{
return flags[t];
}
void dump(const uint8_t *data, int count);
class Record
{
protected:
Tick cycle;
Record(Tick _cycle)
: cycle(_cycle)
{
}
public:
virtual ~Record() {}
virtual void dump(std::ostream &) = 0;
};
class PrintfRecord : public Record
{
private:
const char *format;
const std::string &name;
cp::ArgList &args;
public:
PrintfRecord(const char *_format, cp::ArgList &_args,
Tick cycle, const std::string &_name)
: Record(cycle), format(_format), name(_name), args(_args)
{
}
virtual ~PrintfRecord();
virtual void dump(std::ostream &);
};
class RawDataRecord : public Record
{
private:
uint8_t *data;
int len;
public:
RawDataRecord(Tick cycle, const uint8_t *_data, int _len);
virtual ~RawDataRecord();
virtual void dump(std::ostream &);
};
class Log
{
private:
int size; // number of records in log
Record **buffer; // array of 'size' Record ptrs (circular buf)
Record **nextRecPtr; // next slot to use in buffer
Record **wrapRecPtr; // &buffer[size], for quick wrap check
public:
Log();
~Log();
void init(int _size);
void append(Record *); // append trace record to log
void dump(std::ostream &); // dump contents to stream
};
extern Log theLog;
extern int dprintf_ignore_size;
bool
dprintf_ignore_name(const std::string &name);
inline void
dprintf(const char *format, cp::ArgList &args, Tick cycle,
const std::string &name)
{
if (!dprintf_ignore_size || name.empty() || !dprintf_ignore_name(name))
theLog.append(new Trace::PrintfRecord(format, args, cycle, name));
}
inline void
rawDump(const uint8_t *data, int len)
{
theLog.append(new Trace::RawDataRecord(curTick, data, len));
}
extern const std::string DefaultName;
};
inline const std::string &name() { return Trace::DefaultName; }
std::ostream &DebugOut();
//
// DPRINTF is a debugging trace facility that allows one to
// selectively enable tracing statements. To use DPRINTF, there must
// be a function or functor called name() that returns a const
// std::string & in the current scope.
//
// If you desire that the automatic printing not occur, use DPRINTFR
// (R for raw)
//
#if TRACING_ON
#define DTRACE(x) (Trace::IsOn(Trace::x))
#define DCOUT(x) if (Trace::IsOn(Trace::x)) DebugOut()
#define DDUMP(x, data, count) \
do { \
using namespace Trace; \
if (Trace::IsOn(Trace::x)) \
rawDump(data, count); \
} while (0)
#define __dprintf(cycle, name, format, args...) \
Trace::dprintf(format, (*(new cp::ArgList), args), cycle, name)
#define DPRINTF(x, args...) \
do { \
if (Trace::IsOn(Trace::x)) \
__dprintf(curTick, name(), args, cp::ArgListNull()); \
} while (0)
#define DPRINTFR(x, args...) \
do { \
if (Trace::IsOn(Trace::x)) \
__dprintf((Tick)-1, string(), args, cp::ArgListNull()); \
} while (0)
#define DPRINTFN(args...) \
do { \
__dprintf(curTick, name(), args, cp::ArgListNull()); \
} while (0)
#else // !TRACING_ON
#define DTRACE(x) (false)
#define DCOUT(x) if (0) DebugOut()
#define DPRINTF(x, args...) do {} while(0)
#define DPRINTFR(args...) do {} while(0)
#define DPRINTFN(args...) do {} while(0)
#define DDUMP(x, data, count) do {} while(0)
#endif // TRACING_ON
#endif // __TRACE_HH__