bbf952376e
This is basically the same thing that was done for tlaser_uart --HG-- extra : convert_revision : e0de84b83d1ee4fe0ef769b4de232dbbd7d9c228
206 lines
5.2 KiB
C++
206 lines
5.2 KiB
C++
/* $Id$ */
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/* @file
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* Tsunami UART
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*/
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/*
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* Copyright (C) 1998 by the Board of Trustees
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* of Leland Stanford Junior University.
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* Copyright (C) 1998 Digital Equipment Corporation
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*
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* This file is part of the SimOS distribution.
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* See LICENSE file for terms of the license.
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*
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*/
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#include <string>
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#include <vector>
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#include "base/inifile.hh"
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#include "base/str.hh" // for to_number
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#include "base/trace.hh"
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#include "dev/console.hh"
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#include "dev/tsunami_uart.hh"
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#include "mem/functional_mem/memory_control.hh"
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#include "sim/builder.hh"
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#include "targetarch/ev5.hh"
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using namespace std;
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#define CONS_INT_TX 0x01 // interrupt enable / state bits
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#define CONS_INT_RX 0x02
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TsunamiUart::TsunamiUart(const string &name, SimConsole *c,
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Addr addr, Addr mask, MemoryController *mmu)
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: MmapDevice(name, addr, mask, mmu),
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cons(c), status_store(0), valid_char(false)
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{
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}
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Fault
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TsunamiUart::read(MemReqPtr req, uint8_t *data)
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{
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Addr daddr = req->paddr & addr_mask;
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DPRINTF(TsunamiUart, " read register %#x\n", daddr);
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switch (req->size) {
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case sizeof(uint64_t):
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*(uint64_t *)data = 0;
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break;
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case sizeof(uint32_t):
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*(uint32_t *)data = 0;
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break;
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case sizeof(uint16_t):
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*(uint16_t *)data = 0;
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break;
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case sizeof(uint8_t):
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*(uint8_t *)data = 0;
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break;
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}
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switch (daddr) {
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case 0xD: // Status Register
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{
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int status = cons->intStatus();
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if (!valid_char) {
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valid_char = cons->in(next_char);
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if (!valid_char)
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status &= ~CONS_INT_RX;
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} else {
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status |= CONS_INT_RX;
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}
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if (status_store == 3) {
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// RR3 stuff? Don't really understand it, btw
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status_store = 0;
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if (status & CONS_INT_TX) {
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*data = (1 << 4);
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return No_Fault;
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} else if (status & CONS_INT_RX) {
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*data = (1 << 5);
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return No_Fault;
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} else {
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DPRINTF(TsunamiUart, "spurious read\n");
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return No_Fault;
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}
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} else {
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int reg = (1 << 2) | (1 << 5) | (1 << 6);
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if (status & CONS_INT_RX)
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reg |= (1 << 0);
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*data = reg;
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return No_Fault;
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}
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break;
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}
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case 0x8: // Data register (RX)
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if (!valid_char)
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panic("Invalid character");
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DPRINTF(TsunamiUart, "read data register \'%c\' %#02x\n",
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isprint(next_char) ? next_char : ' ', next_char);
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*data = next_char;
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valid_char = false;
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return No_Fault;
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case 0x9: // Interrupt Enable Register
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*data = 0;
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return No_Fault;
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}
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*data = 0;
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// panic("%s: read daddr=%#x type=read *data=%#x\n", name(), daddr, *data);
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return No_Fault;
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}
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Fault
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TsunamiUart::write(MemReqPtr req, const uint8_t *data)
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{
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Addr daddr = req->paddr & addr_mask;
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DPRINTF(TsunamiUart, " write register %#x value %#x\n", daddr, *(uint8_t*)data);
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switch (daddr) {
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case 0xb:
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status_store = *data;
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switch (*data) {
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case 0x03: // going to read RR3
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return No_Fault;
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case 0x28: // Ack of TX
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{
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if ((cons->intStatus() & CONS_INT_TX) == 0)
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panic("Ack of transmit, though there was no interrupt");
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cons->clearInt(CONS_INT_TX);
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return No_Fault;
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}
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case 0x00:
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case 0x01:
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case 0x12:
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// going to write data???
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return No_Fault;
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default:
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DPRINTF(TsunamiUart, "writing status register %#x \n",
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*(uint64_t *)data);
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return No_Fault;
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}
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case 0x8: // Data register (TX)
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cons->out(*(uint64_t *)data);
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return No_Fault;
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case 0x9: // DLM
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DPRINTF(TsunamiUart, "writing to DLM/IER %#x\n", *(uint8_t*)data);
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return No_Fault;
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case 0xc: // MCR
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DPRINTF(TsunamiUart, "writing to MCR %#x\n", *(uint8_t*)data);
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return No_Fault;
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}
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return No_Fault;
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}
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void
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TsunamiUart::serialize(ostream &os)
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{
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SERIALIZE_SCALAR(status_store);
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SERIALIZE_SCALAR(next_char);
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SERIALIZE_SCALAR(valid_char);
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}
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void
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TsunamiUart::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_SCALAR(status_store);
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UNSERIALIZE_SCALAR(next_char);
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UNSERIALIZE_SCALAR(valid_char);
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}
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiUart)
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SimObjectParam<SimConsole *> console;
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SimObjectParam<MemoryController *> mmu;
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Param<Addr> addr;
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Param<Addr> mask;
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END_DECLARE_SIM_OBJECT_PARAMS(TsunamiUart)
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BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiUart)
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INIT_PARAM(console, "The console"),
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INIT_PARAM(mmu, "Memory Controller"),
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INIT_PARAM(addr, "Device Address"),
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INIT_PARAM(mask, "Address Mask")
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END_INIT_SIM_OBJECT_PARAMS(TsunamiUart)
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CREATE_SIM_OBJECT(TsunamiUart)
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{
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return new TsunamiUart(getInstanceName(), console, addr, mask, mmu);
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}
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REGISTER_SIM_OBJECT("TsunamiUart", TsunamiUart)
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