gem5/src
David Guillen Fandos 5350879f49 pwr: Add power states to ClockedObject
Add 4 power states to the ClockedObject, provides necessary access
functions to check and update the power state. Default power state
is UNDEFINED, it is responsibility of the respective simulation
model to provide the startup state and any other logic for state
change. Add number of transition stat. Add distribution of time
spent in clock gated state. Add power state residency stat. Add
dump call back function to allow stats update of distribution
and residency stats.

Change-Id: Id086090a2ed720c9fcb37812a3c98f0f724907c6
2016-06-06 17:16:43 +01:00
..
arch stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
base dev: Fix incorrect terminal backlog handling 2016-04-27 15:33:58 +01:00
cpu stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
dev stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
doc Revert power patch sets with unexpected interactions 2016-04-06 19:43:31 +01:00
doxygen MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
gpu-compute stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
kern syscall_emul: remove mmapFlagTable 2016-04-01 16:38:16 -07:00
mem stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
proto cpu: Support virtual addr in elastic traces 2015-12-07 16:42:16 -06:00
python power: Allow voltage to be configured via cmd line 2016-05-27 16:54:59 +01:00
sim pwr: Add power states to ClockedObject 2016-06-06 17:16:43 +01:00
unittest style: remove trailing whitespace 2016-02-06 17:21:18 -08:00
Doxyfile Doxygen: Update the version of the Doxyfile 2012-10-11 06:38:42 -04:00
SConscript scons: Bump minimum gcc version to 4.8 2016-05-30 02:10:48 -04:00