c4d0ebd25c
SConscript:
Remove efence option from automatically being used.
--HG--
extra : convert_revision : 466bb8077aa341db0b409720e2a73535b1fa6b69
136 lines
4.2 KiB
C++
136 lines
4.2 KiB
C++
// Todo: Probably add in support for scheduling events (more than one as
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// well) on the case of the ROB being empty or full. Considering tracking
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// free entries instead of insts in ROB. Differentiate between squashing
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// all instructions after the instruction, and all instructions after *and*
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// including that instruction.
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#ifndef __CPU_BETA_CPU_ROB_HH__
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#define __CPU_BETA_CPU_ROB_HH__
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#include <utility>
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#include <vector>
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//#include "arch/alpha/isa_traits.hh"
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/**
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* ROB class. Uses the instruction list that exists within the CPU to
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* represent the ROB. This class doesn't contain that list, but instead
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* a pointer to the CPU to get access to the list. The ROB, in this first
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* implementation, is largely what drives squashing.
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*/
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template <class Impl>
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class ROB
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{
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public:
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//Typedefs from the Impl.
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typedef typename Impl::FullCPU FullCPU;
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typedef typename Impl::DynInstPtr DynInstPtr;
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typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo_t;
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typedef typename list<DynInstPtr>::iterator InstIt_t;
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public:
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/** ROB constructor.
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* @params _numEntries Number of entries in ROB.
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* @params _squashWidth Number of instructions that can be squashed in a
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* single cycle.
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*/
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ROB(unsigned _numEntries, unsigned _squashWidth);
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/** Function to set the CPU pointer, necessary due to which object the ROB
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* is created within.
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* @params cpu_ptr Pointer to the implementation specific full CPU object.
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*/
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void setCPU(FullCPU *cpu_ptr);
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/** Function to insert an instruction into the ROB. The parameter inst is
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* not truly required, but is useful for checking correctness. Note
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* that whatever calls this function must ensure that there is enough
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* space within the ROB for the new instruction.
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* @params inst The instruction being inserted into the ROB.
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* @todo Remove the parameter once correctness is ensured.
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*/
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void insertInst(DynInstPtr &inst);
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/** Returns pointer to the head instruction within the ROB. There is
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* no guarantee as to the return value if the ROB is empty.
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* @retval Pointer to the DynInst that is at the head of the ROB.
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*/
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DynInstPtr readHeadInst() { return cpu->instList.front(); }
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DynInstPtr readTailInst() { return (*tail); }
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void retireHead();
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bool isHeadReady();
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unsigned numFreeEntries();
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bool isFull()
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{ return numInstsInROB == numEntries; }
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bool isEmpty()
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{ return numInstsInROB == 0; }
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void doSquash();
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void squash(InstSeqNum squash_num);
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uint64_t readHeadPC();
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uint64_t readHeadNextPC();
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InstSeqNum readHeadSeqNum();
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uint64_t readTailPC();
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InstSeqNum readTailSeqNum();
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/** Checks if the ROB is still in the process of squashing instructions.
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* @retval Whether or not the ROB is done squashing.
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*/
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bool isDoneSquashing() const { return doneSquashing; }
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/** This is more of a debugging function than anything. Use
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* numInstsInROB to get the instructions in the ROB unless you are
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* double checking that variable.
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*/
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int countInsts();
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private:
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/** Pointer to the CPU. */
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FullCPU *cpu;
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/** Number of instructions in the ROB. */
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unsigned numEntries;
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/** Number of instructions that can be squashed in a single cycle. */
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unsigned squashWidth;
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/** Iterator pointing to the instruction which is the last instruction
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* in the ROB. This may at times be invalid (ie when the ROB is empty),
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* however it should never be incorrect.
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*/
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InstIt_t tail;
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/** Iterator used for walking through the list of instructions when
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* squashing. Used so that there is persistent state between cycles;
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* when squashing, the instructions are marked as squashed but not
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* immediately removed, meaning the tail iterator remains the same before
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* and after a squash.
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* This will always be set to cpu->instList.end() if it is invalid.
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*/
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InstIt_t squashIt;
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/** Number of instructions in the ROB. */
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int numInstsInROB;
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/** The sequence number of the squashed instruction. */
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InstSeqNum squashedSeqNum;
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/** Is the ROB done squashing. */
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bool doneSquashing;
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};
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#endif //__CPU_BETA_CPU_ROB_HH__
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