SConscript: Include new files. arch/alpha/isa_desc: Make the eaCompPtr and memAccPtr non-const so that execute() can be called on them. arch/alpha/isa_traits.hh: Add enum for total number of data registers. arch/isa_parser.py: base/traceflags.py: Include new light-weight OoO CPU model. cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: Changes to abstract more away from the base dyn inst class. cpu/beta_cpu/2bit_local_pred.cc: cpu/beta_cpu/2bit_local_pred.hh: cpu/beta_cpu/tournament_pred.cc: cpu/beta_cpu/tournament_pred.hh: Remove redundant SatCounter class. cpu/beta_cpu/alpha_dyn_inst.cc: cpu/beta_cpu/alpha_full_cpu.cc: cpu/beta_cpu/alpha_full_cpu.hh: cpu/beta_cpu/bpred_unit.cc: cpu/beta_cpu/inst_queue.cc: cpu/beta_cpu/mem_dep_unit.cc: cpu/beta_cpu/ras.cc: cpu/beta_cpu/rename_map.cc: cpu/beta_cpu/rename_map.hh: cpu/beta_cpu/rob.cc: Fix for gcc-3.4 cpu/beta_cpu/alpha_dyn_inst.hh: cpu/beta_cpu/alpha_dyn_inst_impl.hh: Fixes for gcc-3.4. Include more variables and functions that are specific to AlphaDynInst which were once in BaseDynInst. cpu/beta_cpu/alpha_full_cpu_builder.cc: Make params match the current params inherited from BaseCPU. cpu/beta_cpu/alpha_full_cpu_impl.hh: Fixes for gcc-3.4 cpu/beta_cpu/full_cpu.cc: Use new params pointer in BaseCPU. Fix for gcc-3.4. cpu/beta_cpu/full_cpu.hh: Use new params class from BaseCPU. cpu/beta_cpu/iew_impl.hh: Remove unused function. cpu/simple_cpu/simple_cpu.cc: Remove unused global variable. cpu/static_inst.hh: Include OoODynInst for new lightweight OoO CPU --HG-- extra : convert_revision : 34d9f2e64ca0313377391e0d059bf09c040286fa
142 lines
4 KiB
C++
142 lines
4 KiB
C++
// Todo: Create destructor.
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// Have it so that there's a more meaningful name given to the variable
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// that marks the beginning of the FP registers.
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#ifndef __CPU_BETA_CPU_RENAME_MAP_HH__
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#define __CPU_BETA_CPU_RENAME_MAP_HH__
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#include <iostream>
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#include <utility>
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#include <vector>
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#include "cpu/beta_cpu/free_list.hh"
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class SimpleRenameMap
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{
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public:
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/**
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* Pair of a logical register and a physical register. Tells the
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* previous mapping of a logical register to a physical register.
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* Used to roll back the rename map to a previous state.
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*/
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typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo;
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/**
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* Pair of a physical register and a physical register. Used to
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* return the physical register that a logical register has been
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* renamed to, and the previous physical register that the same
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* logical register was previously mapped to.
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*/
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typedef std::pair<PhysRegIndex, PhysRegIndex> RenameInfo;
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public:
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//Constructor
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SimpleRenameMap(unsigned _numLogicalIntRegs,
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unsigned _numPhysicalIntRegs,
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unsigned _numLogicalFloatRegs,
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unsigned _numPhysicalFloatRegs,
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unsigned _numMiscRegs,
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RegIndex _intZeroReg,
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RegIndex _floatZeroReg);
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/** Destructor. */
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~SimpleRenameMap();
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void setFreeList(SimpleFreeList *fl_ptr);
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//Tell rename map to get a free physical register for a given
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//architected register. Not sure it should have a return value,
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//but perhaps it should have some sort of fault in case there are
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//no free registers.
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RenameInfo rename(RegIndex arch_reg);
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PhysRegIndex lookup(RegIndex phys_reg);
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bool isReady(PhysRegIndex arch_reg);
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/**
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* Marks the given register as ready, meaning that its value has been
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* calculated and written to the register file.
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* @params ready_reg The index of the physical register that is now
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* ready.
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*/
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void markAsReady(PhysRegIndex ready_reg);
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void setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg);
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void squash(std::vector<RegIndex> freed_regs,
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std::vector<UnmapInfo> unmaps);
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int numFreeEntries();
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private:
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/** Number of logical integer registers. */
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int numLogicalIntRegs;
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/** Number of physical integer registers. */
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int numPhysicalIntRegs;
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/** Number of logical floating point registers. */
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int numLogicalFloatRegs;
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/** Number of physical floating point registers. */
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int numPhysicalFloatRegs;
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/** Number of miscellaneous registers. */
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int numMiscRegs;
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/** Number of logical integer + float registers. */
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int numLogicalRegs;
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/** Number of physical integer + float registers. */
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int numPhysicalRegs;
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/** The integer zero register. This implementation assumes it is always
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* zero and never can be anything else.
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*/
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RegIndex intZeroReg;
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/** The floating point zero register. This implementation assumes it is
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* always zero and never can be anything else.
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*/
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RegIndex floatZeroReg;
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class RenameEntry
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{
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public:
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PhysRegIndex physical_reg;
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bool valid;
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RenameEntry()
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: physical_reg(0), valid(false)
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{ }
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};
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/** Integer rename map. */
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RenameEntry *intRenameMap;
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/** Floating point rename map. */
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RenameEntry *floatRenameMap;
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/** Free list interface. */
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SimpleFreeList *freeList;
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// Might want to make all these scoreboards into one large scoreboard.
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/** Scoreboard of physical integer registers, saying whether or not they
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* are ready.
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*/
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std::vector<bool> intScoreboard;
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/** Scoreboard of physical floating registers, saying whether or not they
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* are ready.
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*/
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std::vector<bool> floatScoreboard;
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/** Scoreboard of miscellaneous registers, saying whether or not they
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* are ready.
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*/
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std::vector<bool> miscScoreboard;
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};
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#endif //__CPU_BETA_CPU_RENAME_MAP_HH__
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