dc16c1ceb8
This patch adds the ability for an application to request dist-gem5 to begin/ end synchronization using an m5 op. When toggling on sync, all nodes agree on the next sync point based on the maximum of all nodes' ticks. CPUs are suspended until the sync point to avoid sending network messages until sync has been enabled. Toggling off sync acts like a global execution barrier, where all CPUs are disabled until every node reaches the toggle off point. This avoids tricky situations such as one node hitting a toggle off followed by a toggle on before the other nodes hit the first toggle off.
710 lines
19 KiB
C++
710 lines
19 KiB
C++
/*
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* Copyright (c) 2010-2012, 2015 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2011 Advanced Micro Devices, Inc.
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#include <fcntl.h>
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#include <unistd.h>
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#include <cerrno>
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#include <fstream>
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#include <string>
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#include <vector>
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#include "arch/kernel_stats.hh"
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#include "arch/utility.hh"
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#include "arch/vtophys.hh"
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#include "arch/pseudo_inst.hh"
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#include "base/debug.hh"
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#include "base/output.hh"
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#include "config/the_isa.hh"
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#include "cpu/base.hh"
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#include "cpu/quiesce_event.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Loader.hh"
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#include "debug/PseudoInst.hh"
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#include "debug/Quiesce.hh"
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#include "debug/WorkItems.hh"
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#include "dev/net/dist_iface.hh"
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#include "params/BaseCPU.hh"
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#include "sim/full_system.hh"
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#include "sim/initparam_keys.hh"
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#include "sim/process.hh"
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#include "sim/pseudo_inst.hh"
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#include "sim/serialize.hh"
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#include "sim/sim_events.hh"
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#include "sim/sim_exit.hh"
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#include "sim/stat_control.hh"
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#include "sim/stats.hh"
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#include "sim/system.hh"
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#include "sim/vptr.hh"
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using namespace std;
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using namespace Stats;
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using namespace TheISA;
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namespace PseudoInst {
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static inline void
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panicFsOnlyPseudoInst(const char *name)
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{
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panic("Pseudo inst \"%s\" is only available in Full System mode.");
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}
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uint64_t
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pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc)
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{
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uint64_t args[4];
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DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i, %i)\n", func, subfunc);
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// We need to do this in a slightly convoluted way since
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// getArgument() might have side-effects on arg_num. We could have
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// used the Argument class, but due to the possible side effects
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// from getArgument, it'd most likely break.
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int arg_num(0);
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for (int i = 0; i < sizeof(args) / sizeof(*args); ++i) {
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args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false);
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++arg_num;
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}
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switch (func) {
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case 0x00: // arm_func
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arm(tc);
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break;
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case 0x01: // quiesce_func
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quiesce(tc);
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break;
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case 0x02: // quiescens_func
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quiesceSkip(tc);
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break;
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case 0x03: // quiescecycle_func
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quiesceNs(tc, args[0]);
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break;
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case 0x04: // quiescetime_func
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return quiesceTime(tc);
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case 0x07: // rpns_func
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return rpns(tc);
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case 0x09: // wakecpu_func
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wakeCPU(tc, args[0]);
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break;
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case 0x21: // exit_func
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m5exit(tc, args[0]);
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break;
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case 0x22:
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m5fail(tc, args[0], args[1]);
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break;
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case 0x30: // initparam_func
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return initParam(tc, args[0], args[1]);
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case 0x31: // loadsymbol_func
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loadsymbol(tc);
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break;
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case 0x40: // resetstats_func
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resetstats(tc, args[0], args[1]);
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break;
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case 0x41: // dumpstats_func
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dumpstats(tc, args[0], args[1]);
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break;
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case 0x42: // dumprststats_func
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dumpresetstats(tc, args[0], args[1]);
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break;
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case 0x43: // ckpt_func
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m5checkpoint(tc, args[0], args[1]);
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break;
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case 0x4f: // writefile_func
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return writefile(tc, args[0], args[1], args[2], args[3]);
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case 0x50: // readfile_func
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return readfile(tc, args[0], args[1], args[2]);
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case 0x51: // debugbreak_func
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debugbreak(tc);
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break;
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case 0x52: // switchcpu_func
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switchcpu(tc);
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break;
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case 0x53: // addsymbol_func
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addsymbol(tc, args[0], args[1]);
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break;
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case 0x54: // panic_func
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panic("M5 panic instruction called at %s\n", tc->pcState());
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case 0x5a: // work_begin_func
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workbegin(tc, args[0], args[1]);
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break;
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case 0x5b: // work_end_func
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workend(tc, args[0], args[1]);
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break;
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case 0x55: // annotate_func
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case 0x56: // reserved2_func
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case 0x57: // reserved3_func
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case 0x58: // reserved4_func
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case 0x59: // reserved5_func
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warn("Unimplemented m5 op (0x%x)\n", func);
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break;
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/* SE mode functions */
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case 0x60: // syscall_func
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m5Syscall(tc);
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break;
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case 0x61: // pagefault_func
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m5PageFault(tc);
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break;
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/* dist-gem5 functions */
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case 0x62: // distToggleSync_func
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togglesync(tc);
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break;
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default:
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warn("Unhandled m5 op: 0x%x\n", func);
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break;
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}
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return 0;
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}
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void
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arm(ThreadContext *tc)
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{
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DPRINTF(PseudoInst, "PseudoInst::arm()\n");
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if (!FullSystem)
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panicFsOnlyPseudoInst("arm");
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if (tc->getKernelStats())
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tc->getKernelStats()->arm();
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}
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void
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quiesce(ThreadContext *tc)
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{
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DPRINTF(PseudoInst, "PseudoInst::quiesce()\n");
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tc->quiesce();
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}
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void
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quiesceSkip(ThreadContext *tc)
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{
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DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n");
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tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1);
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}
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void
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quiesceNs(ThreadContext *tc, uint64_t ns)
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{
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DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns);
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tc->quiesceTick(curTick() + SimClock::Int::ns * ns);
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}
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void
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quiesceCycles(ThreadContext *tc, uint64_t cycles)
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{
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DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles);
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tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles)));
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}
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uint64_t
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quiesceTime(ThreadContext *tc)
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{
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DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n");
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return (tc->readLastActivate() - tc->readLastSuspend()) /
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SimClock::Int::ns;
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}
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uint64_t
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rpns(ThreadContext *tc)
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{
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DPRINTF(PseudoInst, "PseudoInst::rpns()\n");
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return curTick() / SimClock::Int::ns;
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}
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void
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wakeCPU(ThreadContext *tc, uint64_t cpuid)
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{
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DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid);
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System *sys = tc->getSystemPtr();
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ThreadContext *other_tc = sys->threadContexts[cpuid];
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if (other_tc->status() == ThreadContext::Suspended)
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other_tc->activate();
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}
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void
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m5exit(ThreadContext *tc, Tick delay)
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{
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DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
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if (DistIface::readyToExit(delay)) {
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Tick when = curTick() + delay * SimClock::Int::ns;
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exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
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}
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}
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void
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m5fail(ThreadContext *tc, Tick delay, uint64_t code)
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{
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DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
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Tick when = curTick() + delay * SimClock::Int::ns;
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exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
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}
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void
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loadsymbol(ThreadContext *tc)
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{
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DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n");
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if (!FullSystem)
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panicFsOnlyPseudoInst("loadsymbol");
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const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
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if (filename.empty()) {
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return;
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}
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std::string buffer;
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ifstream file(filename.c_str());
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if (!file)
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fatal("file error: Can't open symbol table file %s\n", filename);
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while (!file.eof()) {
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getline(file, buffer);
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if (buffer.empty())
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continue;
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string::size_type idx = buffer.find(' ');
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if (idx == string::npos)
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continue;
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string address = "0x" + buffer.substr(0, idx);
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eat_white(address);
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if (address.empty())
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continue;
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// Skip over letter and space
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string symbol = buffer.substr(idx + 3);
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eat_white(symbol);
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if (symbol.empty())
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continue;
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Addr addr;
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if (!to_number(address, addr))
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continue;
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if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
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continue;
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DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
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}
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file.close();
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}
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void
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addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
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{
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DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
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addr, symbolAddr);
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if (!FullSystem)
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panicFsOnlyPseudoInst("addSymbol");
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char symb[100];
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CopyStringOut(tc, symb, symbolAddr, 100);
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std::string symbol(symb);
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DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
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tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
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debugSymbolTable->insert(addr,symbol);
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}
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uint64_t
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initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
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{
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DPRINTF(PseudoInst, "PseudoInst::initParam() key:%s%s\n", (char *)&key_str1,
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(char *)&key_str2);
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if (!FullSystem) {
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panicFsOnlyPseudoInst("initParam");
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return 0;
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}
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// The key parameter string is passed in via two 64-bit registers. We copy
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// out the characters from the 64-bit integer variables here and concatenate
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// them in the key_str character buffer
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const int len = 2 * sizeof(uint64_t) + 1;
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char key_str[len];
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memset(key_str, '\0', len);
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if (key_str1 == 0) {
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assert(key_str2 == 0);
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} else {
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strncpy(key_str, (char *)&key_str1, sizeof(uint64_t));
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}
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if (strlen(key_str) == sizeof(uint64_t)) {
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strncpy(key_str + sizeof(uint64_t), (char *)&key_str2,
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sizeof(uint64_t));
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} else {
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assert(key_str2 == 0);
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}
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// Compare the key parameter with the known values to select the return
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// value
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uint64_t val;
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if (strcmp(key_str, InitParamKey::DEFAULT) == 0) {
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val = tc->getCpuPtr()->system->init_param;
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} else if (strcmp(key_str, InitParamKey::DIST_RANK) == 0) {
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val = DistIface::rankParam();
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} else if (strcmp(key_str, InitParamKey::DIST_SIZE) == 0) {
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val = DistIface::sizeParam();
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} else {
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panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str);
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}
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return val;
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}
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void
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resetstats(ThreadContext *tc, Tick delay, Tick period)
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{
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DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period);
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if (!tc->getCpuPtr()->params()->do_statistics_insts)
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return;
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Tick when = curTick() + delay * SimClock::Int::ns;
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Tick repeat = period * SimClock::Int::ns;
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Stats::schedStatEvent(false, true, when, repeat);
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}
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void
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dumpstats(ThreadContext *tc, Tick delay, Tick period)
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{
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DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period);
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if (!tc->getCpuPtr()->params()->do_statistics_insts)
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return;
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Tick when = curTick() + delay * SimClock::Int::ns;
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Tick repeat = period * SimClock::Int::ns;
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Stats::schedStatEvent(true, false, when, repeat);
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}
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void
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dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
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{
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DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period);
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if (!tc->getCpuPtr()->params()->do_statistics_insts)
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return;
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Tick when = curTick() + delay * SimClock::Int::ns;
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Tick repeat = period * SimClock::Int::ns;
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Stats::schedStatEvent(true, true, when, repeat);
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}
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void
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m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
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{
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DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period);
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if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
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return;
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if (DistIface::readyToCkpt(delay, period)) {
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Tick when = curTick() + delay * SimClock::Int::ns;
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Tick repeat = period * SimClock::Int::ns;
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exitSimLoop("checkpoint", 0, when, repeat);
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}
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}
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uint64_t
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readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
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{
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DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
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vaddr, len, offset);
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if (!FullSystem) {
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panicFsOnlyPseudoInst("readfile");
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return 0;
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}
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const string &file = tc->getSystemPtr()->params()->readfile;
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if (file.empty()) {
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return ULL(0);
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}
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uint64_t result = 0;
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int fd = ::open(file.c_str(), O_RDONLY, 0);
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if (fd < 0)
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panic("could not open file %s\n", file);
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if (::lseek(fd, offset, SEEK_SET) < 0)
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panic("could not seek: %s", strerror(errno));
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char *buf = new char[len];
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char *p = buf;
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while (len > 0) {
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int bytes = ::read(fd, p, len);
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if (bytes <= 0)
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break;
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p += bytes;
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result += bytes;
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len -= bytes;
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}
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close(fd);
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CopyIn(tc, vaddr, buf, result);
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delete [] buf;
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return result;
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}
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uint64_t
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writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
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Addr filename_addr)
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{
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DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
|
|
vaddr, len, offset, filename_addr);
|
|
|
|
// copy out target filename
|
|
char fn[100];
|
|
std::string filename;
|
|
CopyStringOut(tc, fn, filename_addr, 100);
|
|
filename = std::string(fn);
|
|
|
|
OutputStream *out;
|
|
if (offset == 0) {
|
|
// create a new file (truncate)
|
|
out = simout.create(filename, true, true);
|
|
} else {
|
|
// do not truncate file if offset is non-zero
|
|
// (ios::in flag is required as well to keep the existing data
|
|
// intact, otherwise existing data will be zeroed out.)
|
|
out = simout.open(filename, ios::in | ios::out | ios::binary, true);
|
|
}
|
|
|
|
ostream *os(out->stream());
|
|
if (!os)
|
|
panic("could not open file %s\n", filename);
|
|
|
|
// seek to offset
|
|
os->seekp(offset);
|
|
|
|
// copy out data and write to file
|
|
char *buf = new char[len];
|
|
CopyOut(tc, buf, vaddr, len);
|
|
os->write(buf, len);
|
|
if (os->fail() || os->bad())
|
|
panic("Error while doing writefile!\n");
|
|
|
|
simout.close(out);
|
|
|
|
delete [] buf;
|
|
|
|
return len;
|
|
}
|
|
|
|
void
|
|
debugbreak(ThreadContext *tc)
|
|
{
|
|
DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n");
|
|
Debug::breakpoint();
|
|
}
|
|
|
|
void
|
|
switchcpu(ThreadContext *tc)
|
|
{
|
|
DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n");
|
|
exitSimLoop("switchcpu");
|
|
}
|
|
|
|
void
|
|
togglesync(ThreadContext *tc)
|
|
{
|
|
DPRINTF(PseudoInst, "PseudoInst::togglesync()\n");
|
|
DistIface::toggleSync(tc);
|
|
}
|
|
|
|
//
|
|
// This function is executed when annotated work items begin. Depending on
|
|
// what the user specified at the command line, the simulation may exit and/or
|
|
// take a checkpoint when a certain work item begins.
|
|
//
|
|
void
|
|
workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
|
|
{
|
|
DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid);
|
|
System *sys = tc->getSystemPtr();
|
|
const System::Params *params = sys->params();
|
|
|
|
if (params->exit_on_work_items) {
|
|
exitSimLoop("workbegin", static_cast<int>(workid));
|
|
return;
|
|
}
|
|
|
|
DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
|
|
threadid);
|
|
tc->getCpuPtr()->workItemBegin();
|
|
sys->workItemBegin(threadid, workid);
|
|
|
|
//
|
|
// If specified, determine if this is the specific work item the user
|
|
// identified
|
|
//
|
|
if (params->work_item_id == -1 || params->work_item_id == workid) {
|
|
|
|
uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
|
|
int cpuId = tc->getCpuPtr()->cpuId();
|
|
|
|
if (params->work_cpus_ckpt_count != 0 &&
|
|
sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
|
|
//
|
|
// If active cpus equals checkpoint count, create checkpoint
|
|
//
|
|
exitSimLoop("checkpoint");
|
|
}
|
|
|
|
if (systemWorkBeginCount == params->work_begin_ckpt_count) {
|
|
//
|
|
// Note: the string specified as the cause of the exit event must
|
|
// exactly equal "checkpoint" inorder to create a checkpoint
|
|
//
|
|
exitSimLoop("checkpoint");
|
|
}
|
|
|
|
if (systemWorkBeginCount == params->work_begin_exit_count) {
|
|
//
|
|
// If a certain number of work items started, exit simulation
|
|
//
|
|
exitSimLoop("work started count reach");
|
|
}
|
|
|
|
if (cpuId == params->work_begin_cpu_id_exit) {
|
|
//
|
|
// If work started on the cpu id specified, exit simulation
|
|
//
|
|
exitSimLoop("work started on specific cpu");
|
|
}
|
|
}
|
|
}
|
|
|
|
//
|
|
// This function is executed when annotated work items end. Depending on
|
|
// what the user specified at the command line, the simulation may exit and/or
|
|
// take a checkpoint when a certain work item ends.
|
|
//
|
|
void
|
|
workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
|
|
{
|
|
DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid);
|
|
System *sys = tc->getSystemPtr();
|
|
const System::Params *params = sys->params();
|
|
|
|
if (params->exit_on_work_items) {
|
|
exitSimLoop("workend", static_cast<int>(workid));
|
|
return;
|
|
}
|
|
|
|
DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
|
|
tc->getCpuPtr()->workItemEnd();
|
|
sys->workItemEnd(threadid, workid);
|
|
|
|
//
|
|
// If specified, determine if this is the specific work item the user
|
|
// identified
|
|
//
|
|
if (params->work_item_id == -1 || params->work_item_id == workid) {
|
|
|
|
uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
|
|
int cpuId = tc->getCpuPtr()->cpuId();
|
|
|
|
if (params->work_cpus_ckpt_count != 0 &&
|
|
sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
|
|
//
|
|
// If active cpus equals checkpoint count, create checkpoint
|
|
//
|
|
exitSimLoop("checkpoint");
|
|
}
|
|
|
|
if (params->work_end_ckpt_count != 0 &&
|
|
systemWorkEndCount == params->work_end_ckpt_count) {
|
|
//
|
|
// If total work items completed equals checkpoint count, create
|
|
// checkpoint
|
|
//
|
|
exitSimLoop("checkpoint");
|
|
}
|
|
|
|
if (params->work_end_exit_count != 0 &&
|
|
systemWorkEndCount == params->work_end_exit_count) {
|
|
//
|
|
// If total work items completed equals exit count, exit simulation
|
|
//
|
|
exitSimLoop("work items exit count reached");
|
|
}
|
|
}
|
|
}
|
|
|
|
} // namespace PseudoInst
|