4f430e9ab5
arch/mips/isa/bitfields.isa: add RS_SRL bitfield ...these must be set to 0 for a SRL instruction arch/mips/isa/decoder.isa: Make unimplemented instructions Fail instead of just Warn Edits to SRA & SRAV instructions Implement CFC1 instructions Unaligned Memory Access Support (Maybe Not fully functional yet) Enforce a more strict decode policy (in terms of different bitfields set to 0 on certain instructions) arch/mips/isa/formats/branch.isa: Fix disassembly arch/mips/isa/formats/int.isa: Add sign extend Immediate and zero extend Immediate to Int class. Probably a bit unnecessary in the long run since these manipulations could be done in the actually instruction instead of keep a int value arch/mips/isa/formats/mem.isa: Comment/Remove out split-memory access code... revisit this after SimpleCPU works arch/mips/isa/formats/unimp.isa: Add inst2string function to Unimplemented panic. PRints out the instruction binary to help in debuggin arch/mips/isa/formats/unknown.isa: define inst2string function , use in unknown disassembly and panic function arch/mips/isa/operands.isa: Make "Mem" default to a unsigned word since this is MIPS32 arch/mips/isa_traits.hh: change return values to 32 instead of 64 arch/mips/linux_process.cc: assign some syscalls to the right functions cpu/static_inst.hh: more debug functions for MIPS (these will be move to the mips directory soon) mem/page_table.cc: mem/page_table.hh: toward a better implementation for unaligned memory access mem/request.hh: NO ALIGN FAULT flag added to support unaligned memory access sim/syscall_emul.cc: additional SyscallVerbose comments --HG-- extra : convert_revision : 1987d80c9f4ede507f1f0148435e0bee97d2428c |
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.. | ||
memtest | ||
o3 | ||
ozone | ||
simple | ||
trace | ||
base.cc | ||
base.hh | ||
base_dyn_inst.cc | ||
base_dyn_inst.hh | ||
cpu_exec_context.cc | ||
cpu_exec_context.hh | ||
cpu_models.py | ||
exec_context.hh | ||
exetrace.cc | ||
exetrace.hh | ||
inst_seq.hh | ||
intr_control.cc | ||
intr_control.hh | ||
op_class.cc | ||
op_class.hh | ||
pc_event.cc | ||
pc_event.hh | ||
profile.cc | ||
profile.hh | ||
SConscript | ||
smt.hh | ||
static_inst.cc | ||
static_inst.hh |