20e9a90edc
which I need to update the misc. regfile accesses
arch/mips/faults.cc:
arch/mips/faults.hh:
alpha to mips
arch/mips/isa/base.isa:
add includes
arch/mips/isa/bitfields.isa:
more bitfields
arch/mips/isa/decoder.isa:
lots o' lots o' lots o' changes!!!!
arch/mips/isa/formats.isa:
include cop0.isa
arch/mips/isa/formats/basic.isa:
fix faults
arch/mips/isa/formats/branch.isa:
arch/mips/isa/formats/fp.isa:
arch/mips/isa/formats/int.isa:
arch/mips/isa/formats/mem.isa:
arch/mips/isa/formats/noop.isa:
arch/mips/isa/formats/trap.isa:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
arch/mips/isa/formats/util.isa:
arch/mips/isa/operands.isa:
arch/mips/isa_traits.cc:
arch/mips/linux_process.cc:
merge MIPS-specific comilable/buidable files code into multiarch
arch/mips/isa_traits.hh:
merge MIPS-specific comilable/buidable files code into multiarch... the miscRegs file accesses i have
need to be recoded and everything should build then ...
arch/mips/stacktrace.hh:
file copied over
--HG--
extra : convert_revision : 4a72e14fc5fb0a0d1f8b205dadbbf69636b7fb1f
119 lines
3.2 KiB
C++
119 lines
3.2 KiB
C++
/*
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* Copyright (c) 2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ALPHA_STACKTRACE_HH__
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#define __ARCH_ALPHA_STACKTRACE_HH__
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#include "base/trace.hh"
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#include "cpu/static_inst.hh"
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class ExecContext;
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class StackTrace;
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class ProcessInfo
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{
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private:
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ExecContext *xc;
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int thread_info_size;
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int task_struct_size;
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int task_off;
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int pid_off;
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int name_off;
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public:
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ProcessInfo(ExecContext *_xc);
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Addr task(Addr ksp) const;
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int pid(Addr ksp) const;
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std::string name(Addr ksp) const;
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};
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class StackTrace
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{
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protected:
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typedef TheISA::MachInst MachInst;
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private:
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ExecContext *xc;
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std::vector<Addr> stack;
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private:
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bool isEntry(Addr addr);
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bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra);
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bool decodeSave(MachInst inst, int ®, int &disp);
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bool decodeStack(MachInst inst, int &disp);
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void trace(ExecContext *xc, bool is_call);
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public:
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StackTrace();
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StackTrace(ExecContext *xc, StaticInstPtr inst);
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~StackTrace();
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void clear()
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{
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xc = 0;
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stack.clear();
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}
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bool valid() const { return xc != NULL; }
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bool trace(ExecContext *xc, StaticInstPtr inst);
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public:
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const std::vector<Addr> &getstack() const { return stack; }
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static const int user = 1;
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static const int console = 2;
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static const int unknown = 3;
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#if TRACING_ON
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private:
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void dump();
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public:
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void dprintf() { if (DTRACE(Stack)) dump(); }
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#else
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public:
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void dprintf() {}
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#endif
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};
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inline bool
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StackTrace::trace(ExecContext *xc, StaticInstPtr inst)
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{
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if (!inst->isCall() && !inst->isReturn())
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return false;
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if (valid())
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clear();
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trace(xc, !inst->isReturn());
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return true;
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}
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#endif // __ARCH_ALPHA_STACKTRACE_HH__
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