661 lines
77 KiB
Text
661 lines
77 KiB
Text
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---------- Begin Simulation Statistics ----------
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sim_seconds 0.000092 # Number of seconds simulated
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sim_ticks 91859 # Number of ticks simulated
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final_tick 91859 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000 # Frequency of simulated ticks
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host_inst_rate 91408 # Simulator instruction rate (inst/s)
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host_op_rate 165563 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 1559913 # Simulator tick rate (ticks/s)
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host_mem_usage 432272 # Number of bytes of host memory used
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host_seconds 0.06 # Real time elapsed on the host
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sim_insts 5381 # Number of instructions simulated
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sim_ops 9748 # Number of ops (including micro ops) simulated
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system.voltage_domain.voltage 1 # Voltage in Volts
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system.clk_domain.clock 1 # Clock period in ticks
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system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
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system.mem_ctrls.bytes_read::ruby.dir_cntrl0 88128 # Number of bytes read from this memory
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system.mem_ctrls.bytes_read::total 88128 # Number of bytes read from this memory
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system.mem_ctrls.bytes_written::ruby.dir_cntrl0 87872 # Number of bytes written to this memory
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system.mem_ctrls.bytes_written::total 87872 # Number of bytes written to this memory
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system.mem_ctrls.num_reads::ruby.dir_cntrl0 1377 # Number of read requests responded to by this memory
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system.mem_ctrls.num_reads::total 1377 # Number of read requests responded to by this memory
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system.mem_ctrls.num_writes::ruby.dir_cntrl0 1373 # Number of write requests responded to by this memory
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system.mem_ctrls.num_writes::total 1373 # Number of write requests responded to by this memory
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system.mem_ctrls.bw_read::ruby.dir_cntrl0 959383403 # Total read bandwidth from this memory (bytes/s)
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system.mem_ctrls.bw_read::total 959383403 # Total read bandwidth from this memory (bytes/s)
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system.mem_ctrls.bw_write::ruby.dir_cntrl0 956596523 # Write bandwidth from this memory (bytes/s)
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system.mem_ctrls.bw_write::total 956596523 # Write bandwidth from this memory (bytes/s)
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system.mem_ctrls.bw_total::ruby.dir_cntrl0 1915979926 # Total bandwidth to/from this memory (bytes/s)
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system.mem_ctrls.bw_total::total 1915979926 # Total bandwidth to/from this memory (bytes/s)
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system.mem_ctrls.readReqs 1377 # Number of read requests accepted
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system.mem_ctrls.writeReqs 1373 # Number of write requests accepted
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system.mem_ctrls.readBursts 1377 # Number of DRAM read bursts, including those serviced by the write queue
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system.mem_ctrls.writeBursts 1373 # Number of DRAM write bursts, including those merged in the write queue
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system.mem_ctrls.bytesReadDRAM 41408 # Total number of bytes read from DRAM
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system.mem_ctrls.bytesReadWrQ 46720 # Total number of bytes read from write queue
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system.mem_ctrls.bytesWritten 41728 # Total number of bytes written to DRAM
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system.mem_ctrls.bytesReadSys 88128 # Total read bytes from the system interface side
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system.mem_ctrls.bytesWrittenSys 87872 # Total written bytes from the system interface side
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system.mem_ctrls.servicedByWrQ 730 # Number of DRAM read bursts serviced by the write queue
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system.mem_ctrls.mergedWrBursts 702 # Number of DRAM write bursts merged with an existing one
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system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
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system.mem_ctrls.perBankRdBursts::0 60 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::1 2 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::2 6 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::3 10 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::4 51 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::5 53 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::6 39 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::7 57 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::8 28 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::9 129 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::10 115 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::11 24 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::12 2 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::13 28 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::14 8 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::15 35 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::0 55 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::1 2 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::2 6 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::3 8 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::4 52 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::5 48 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::6 38 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::7 60 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::8 28 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::9 130 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::10 123 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::11 24 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::12 2 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::13 31 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::14 8 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::15 37 # Per bank write bursts
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system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
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system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
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system.mem_ctrls.totGap 91773 # Total gap between requests
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system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::6 1377 # Read request sizes (log2)
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system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::6 1373 # Write request sizes (log2)
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system.mem_ctrls.rdQLenPdf::0 647 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::15 6 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::16 6 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::17 33 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::18 42 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::19 42 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::20 43 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::21 44 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::22 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::23 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::24 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::25 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::26 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::27 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::28 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::29 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::30 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::31 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::32 40 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
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system.mem_ctrls.bytesPerActivate::samples 263 # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::mean 304.669202 # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::gmean 201.653389 # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::stdev 284.735596 # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::0-127 72 27.38% 27.38% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::128-255 68 25.86% 53.23% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::256-383 44 16.73% 69.96% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::384-511 29 11.03% 80.99% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::512-639 12 4.56% 85.55% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::640-767 9 3.42% 88.97% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::768-895 6 2.28% 91.25% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::896-1023 3 1.14% 92.40% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::1024-1151 20 7.60% 100.00% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::total 263 # Bytes accessed per row activation
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system.mem_ctrls.rdPerTurnAround::samples 40 # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::mean 16.100000 # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::gmean 15.846587 # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::stdev 3.484765 # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::12-13 3 7.50% 7.50% # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::14-15 12 30.00% 37.50% # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::16-17 19 47.50% 85.00% # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::18-19 4 10.00% 95.00% # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::20-21 1 2.50% 97.50% # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::34-35 1 2.50% 100.00% # Reads before turning the bus around for writes
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system.mem_ctrls.rdPerTurnAround::total 40 # Reads before turning the bus around for writes
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system.mem_ctrls.wrPerTurnAround::samples 40 # Writes before turning the bus around for reads
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system.mem_ctrls.wrPerTurnAround::mean 16.300000 # Writes before turning the bus around for reads
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system.mem_ctrls.wrPerTurnAround::gmean 16.281263 # Writes before turning the bus around for reads
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system.mem_ctrls.wrPerTurnAround::stdev 0.822753 # Writes before turning the bus around for reads
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system.mem_ctrls.wrPerTurnAround::16 35 87.50% 87.50% # Writes before turning the bus around for reads
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system.mem_ctrls.wrPerTurnAround::18 3 7.50% 95.00% # Writes before turning the bus around for reads
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system.mem_ctrls.wrPerTurnAround::19 2 5.00% 100.00% # Writes before turning the bus around for reads
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system.mem_ctrls.wrPerTurnAround::total 40 # Writes before turning the bus around for reads
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system.mem_ctrls.totQLat 12721 # Total ticks spent queuing
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system.mem_ctrls.totMemAccLat 25014 # Total ticks spent from burst creation until serviced by the DRAM
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system.mem_ctrls.totBusLat 3235 # Total ticks spent in databus transfers
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system.mem_ctrls.avgQLat 19.66 # Average queueing delay per DRAM burst
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system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
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system.mem_ctrls.avgMemAccLat 38.66 # Average memory access latency per DRAM burst
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system.mem_ctrls.avgRdBW 450.78 # Average DRAM read bandwidth in MiByte/s
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system.mem_ctrls.avgWrBW 454.26 # Average achieved write bandwidth in MiByte/s
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system.mem_ctrls.avgRdBWSys 959.38 # Average system read bandwidth in MiByte/s
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system.mem_ctrls.avgWrBWSys 956.60 # Average system write bandwidth in MiByte/s
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system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
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system.mem_ctrls.busUtil 7.07 # Data bus utilization in percentage
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system.mem_ctrls.busUtilRead 3.52 # Data bus utilization in percentage for reads
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system.mem_ctrls.busUtilWrite 3.55 # Data bus utilization in percentage for writes
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system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
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system.mem_ctrls.avgWrQLen 25.84 # Average write queue length when enqueuing
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system.mem_ctrls.readRowHits 435 # Number of row buffer hits during reads
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system.mem_ctrls.writeRowHits 591 # Number of row buffer hits during writes
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system.mem_ctrls.readRowHitRate 67.23 # Row buffer hit rate for reads
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system.mem_ctrls.writeRowHitRate 88.08 # Row buffer hit rate for writes
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system.mem_ctrls.avgGap 33.37 # Average gap between requests
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system.mem_ctrls.pageHitRate 77.85 # Row buffer hit rate, read and write combined
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system.mem_ctrls_0.actEnergy 664020 # Energy for activate commands per rank (pJ)
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system.mem_ctrls_0.preEnergy 340032 # Energy for precharge commands per rank (pJ)
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system.mem_ctrls_0.readEnergy 3175872 # Energy for read commands per rank (pJ)
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system.mem_ctrls_0.writeEnergy 2246688 # Energy for write commands per rank (pJ)
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system.mem_ctrls_0.refreshEnergy 7375680.000000 # Energy for refresh commands per rank (pJ)
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system.mem_ctrls_0.actBackEnergy 10273224 # Energy for active background per rank (pJ)
|
|
system.mem_ctrls_0.preBackEnergy 269568 # Energy for precharge background per rank (pJ)
|
|
system.mem_ctrls_0.actPowerDownEnergy 25208136 # Energy for active power-down per rank (pJ)
|
|
system.mem_ctrls_0.prePowerDownEnergy 4818816 # Energy for precharge power-down per rank (pJ)
|
|
system.mem_ctrls_0.selfRefreshEnergy 743760.000000 # Energy for self refresh per rank (pJ)
|
|
system.mem_ctrls_0.totalEnergy 55115796 # Total energy per rank (pJ)
|
|
system.mem_ctrls_0.averagePower 600.004311 # Core power per rank (mW)
|
|
system.mem_ctrls_0.totalIdleTime 68393 # Total Idle time Per DRAM Rank
|
|
system.mem_ctrls_0.memoryStateTime::IDLE 346 # Time in different power states
|
|
system.mem_ctrls_0.memoryStateTime::REF 3126 # Time in different power states
|
|
system.mem_ctrls_0.memoryStateTime::SREF 798 # Time in different power states
|
|
system.mem_ctrls_0.memoryStateTime::PRE_PDN 12549 # Time in different power states
|
|
system.mem_ctrls_0.memoryStateTime::ACT 19759 # Time in different power states
|
|
system.mem_ctrls_0.memoryStateTime::ACT_PDN 55281 # Time in different power states
|
|
system.mem_ctrls_1.actEnergy 1285200 # Energy for activate commands per rank (pJ)
|
|
system.mem_ctrls_1.preEnergy 676200 # Energy for precharge commands per rank (pJ)
|
|
system.mem_ctrls_1.readEnergy 4215456 # Energy for read commands per rank (pJ)
|
|
system.mem_ctrls_1.writeEnergy 3198816 # Energy for write commands per rank (pJ)
|
|
system.mem_ctrls_1.refreshEnergy 6761040.000000 # Energy for refresh commands per rank (pJ)
|
|
system.mem_ctrls_1.actBackEnergy 9576912 # Energy for active background per rank (pJ)
|
|
system.mem_ctrls_1.preBackEnergy 183552 # Energy for precharge background per rank (pJ)
|
|
system.mem_ctrls_1.actPowerDownEnergy 28147512 # Energy for active power-down per rank (pJ)
|
|
system.mem_ctrls_1.prePowerDownEnergy 3322368 # Energy for precharge power-down per rank (pJ)
|
|
system.mem_ctrls_1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
|
|
system.mem_ctrls_1.totalEnergy 57367056 # Total energy per rank (pJ)
|
|
system.mem_ctrls_1.averagePower 624.512089 # Core power per rank (mW)
|
|
system.mem_ctrls_1.totalIdleTime 70328 # Total Idle time Per DRAM Rank
|
|
system.mem_ctrls_1.memoryStateTime::IDLE 150 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::REF 2866 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::SREF 0 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::PRE_PDN 8652 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::ACT 18464 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::ACT_PDN 61727 # Time in different power states
|
|
system.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.cpu.clk_domain.clock 1 # Clock period in ticks
|
|
system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.cpu.apic_clk_domain.clock 16 # Clock period in ticks
|
|
system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.cpu.workload.num_syscalls 11 # Number of system calls
|
|
system.cpu.pwrStateResidencyTicks::ON 91859 # Cumulative time (in ticks) in various power states
|
|
system.cpu.numCycles 91859 # number of cpu cycles simulated
|
|
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
|
|
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
|
|
system.cpu.committedInsts 5381 # Number of instructions committed
|
|
system.cpu.committedOps 9748 # Number of ops (including micro ops) committed
|
|
system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses
|
|
system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
|
|
system.cpu.num_func_calls 209 # number of times a function call or return occured
|
|
system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls
|
|
system.cpu.num_int_insts 9654 # number of integer instructions
|
|
system.cpu.num_fp_insts 0 # number of float instructions
|
|
system.cpu.num_int_register_reads 18335 # number of times the integer registers were read
|
|
system.cpu.num_int_register_writes 7527 # number of times the integer registers were written
|
|
system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
|
|
system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
|
|
system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read
|
|
system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written
|
|
system.cpu.num_mem_refs 1988 # number of memory refs
|
|
system.cpu.num_load_insts 1053 # Number of load instructions
|
|
system.cpu.num_store_insts 935 # Number of store instructions
|
|
system.cpu.num_idle_cycles 0.999989 # Number of idle cycles
|
|
system.cpu.num_busy_cycles 91858.000011 # Number of busy cycles
|
|
system.cpu.not_idle_fraction 0.999989 # Percentage of non-idle cycles
|
|
system.cpu.idle_fraction 0.000011 # Percentage of idle cycles
|
|
system.cpu.Branches 1208 # Number of branches fetched
|
|
system.cpu.op_class::No_OpClass 1 0.01% 0.01% # Class of executed instruction
|
|
system.cpu.op_class::IntAlu 7749 79.49% 79.50% # Class of executed instruction
|
|
system.cpu.op_class::IntMult 3 0.03% 79.53% # Class of executed instruction
|
|
system.cpu.op_class::IntDiv 7 0.07% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::FloatCmp 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::FloatCvt 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::FloatMult 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::FloatMultAcc 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::FloatDiv 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::FloatMisc 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::FloatSqrt 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdAdd 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdAddAcc 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdAlu 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdCmp 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdCvt 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdMisc 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdMult 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdMultAcc 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdShift 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdShiftAcc 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdSqrt 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatAdd 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatAlu 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatCmp 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatCvt 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatDiv 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMisc 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMult 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction
|
|
system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction
|
|
system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::total 9748 # Class of executed instruction
|
|
system.ruby.clk_domain.clock 1 # Clock period in ticks
|
|
system.ruby.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.delayHist::bucket_size 1 # delay histogram for all message
|
|
system.ruby.delayHist::max_bucket 9 # delay histogram for all message
|
|
system.ruby.delayHist::samples 2750 # delay histogram for all message
|
|
system.ruby.delayHist | 2750 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
|
|
system.ruby.delayHist::total 2750 # delay histogram for all message
|
|
system.ruby.outstanding_req_hist_seqr::bucket_size 1
|
|
system.ruby.outstanding_req_hist_seqr::max_bucket 9
|
|
system.ruby.outstanding_req_hist_seqr::samples 8852
|
|
system.ruby.outstanding_req_hist_seqr::mean 1
|
|
system.ruby.outstanding_req_hist_seqr::gmean 1
|
|
system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 8852 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.outstanding_req_hist_seqr::total 8852
|
|
system.ruby.latency_hist_seqr::bucket_size 64
|
|
system.ruby.latency_hist_seqr::max_bucket 639
|
|
system.ruby.latency_hist_seqr::samples 8852
|
|
system.ruby.latency_hist_seqr::mean 9.377203
|
|
system.ruby.latency_hist_seqr::gmean 1.827971
|
|
system.ruby.latency_hist_seqr::stdev 23.652747
|
|
system.ruby.latency_hist_seqr | 8226 92.93% 92.93% | 589 6.65% 99.58% | 26 0.29% 99.88% | 4 0.05% 99.92% | 3 0.03% 99.95% | 4 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.latency_hist_seqr::total 8852
|
|
system.ruby.hit_latency_hist_seqr::bucket_size 1
|
|
system.ruby.hit_latency_hist_seqr::max_bucket 9
|
|
system.ruby.hit_latency_hist_seqr::samples 7475
|
|
system.ruby.hit_latency_hist_seqr::mean 1
|
|
system.ruby.hit_latency_hist_seqr::gmean 1
|
|
system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 7475 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.hit_latency_hist_seqr::total 7475
|
|
system.ruby.miss_latency_hist_seqr::bucket_size 64
|
|
system.ruby.miss_latency_hist_seqr::max_bucket 639
|
|
system.ruby.miss_latency_hist_seqr::samples 1377
|
|
system.ruby.miss_latency_hist_seqr::mean 54.852578
|
|
system.ruby.miss_latency_hist_seqr::gmean 48.312712
|
|
system.ruby.miss_latency_hist_seqr::stdev 33.880423
|
|
system.ruby.miss_latency_hist_seqr | 751 54.54% 54.54% | 589 42.77% 97.31% | 26 1.89% 99.20% | 4 0.29% 99.49% | 3 0.22% 99.71% | 4 0.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.miss_latency_hist_seqr::total 1377
|
|
system.ruby.Directory.incomplete_times_seqr 1376
|
|
system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits
|
|
system.ruby.l1_cntrl0.cacheMemory.demand_misses 1377 # Number of cache demand misses
|
|
system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8852 # Number of cache demand accesses
|
|
system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
|
|
system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.routers0.percent_links_utilized 7.484297
|
|
system.ruby.network.routers0.msg_count.Control::2 1377
|
|
system.ruby.network.routers0.msg_count.Data::2 1373
|
|
system.ruby.network.routers0.msg_count.Response_Data::4 1377
|
|
system.ruby.network.routers0.msg_count.Writeback_Control::3 1373
|
|
system.ruby.network.routers0.msg_bytes.Control::2 11016
|
|
system.ruby.network.routers0.msg_bytes.Data::2 98856
|
|
system.ruby.network.routers0.msg_bytes.Response_Data::4 99144
|
|
system.ruby.network.routers0.msg_bytes.Writeback_Control::3 10984
|
|
system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.routers1.percent_links_utilized 7.484297
|
|
system.ruby.network.routers1.msg_count.Control::2 1377
|
|
system.ruby.network.routers1.msg_count.Data::2 1373
|
|
system.ruby.network.routers1.msg_count.Response_Data::4 1377
|
|
system.ruby.network.routers1.msg_count.Writeback_Control::3 1373
|
|
system.ruby.network.routers1.msg_bytes.Control::2 11016
|
|
system.ruby.network.routers1.msg_bytes.Data::2 98856
|
|
system.ruby.network.routers1.msg_bytes.Response_Data::4 99144
|
|
system.ruby.network.routers1.msg_bytes.Writeback_Control::3 10984
|
|
system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.routers2.percent_links_utilized 7.484297
|
|
system.ruby.network.routers2.msg_count.Control::2 1377
|
|
system.ruby.network.routers2.msg_count.Data::2 1373
|
|
system.ruby.network.routers2.msg_count.Response_Data::4 1377
|
|
system.ruby.network.routers2.msg_count.Writeback_Control::3 1373
|
|
system.ruby.network.routers2.msg_bytes.Control::2 11016
|
|
system.ruby.network.routers2.msg_bytes.Data::2 98856
|
|
system.ruby.network.routers2.msg_bytes.Response_Data::4 99144
|
|
system.ruby.network.routers2.msg_bytes.Writeback_Control::3 10984
|
|
system.ruby.network.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.msg_count.Control 4131
|
|
system.ruby.network.msg_count.Data 4119
|
|
system.ruby.network.msg_count.Response_Data 4131
|
|
system.ruby.network.msg_count.Writeback_Control 4119
|
|
system.ruby.network.msg_byte.Control 33048
|
|
system.ruby.network.msg_byte.Data 296568
|
|
system.ruby.network.msg_byte.Response_Data 297432
|
|
system.ruby.network.msg_byte.Writeback_Control 32952
|
|
system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.routers0.throttle0.link_utilization 7.493006
|
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377
|
|
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373
|
|
system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 99144
|
|
system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10984
|
|
system.ruby.network.routers0.throttle1.link_utilization 7.475588
|
|
system.ruby.network.routers0.throttle1.msg_count.Control::2 1377
|
|
system.ruby.network.routers0.throttle1.msg_count.Data::2 1373
|
|
system.ruby.network.routers0.throttle1.msg_bytes.Control::2 11016
|
|
system.ruby.network.routers0.throttle1.msg_bytes.Data::2 98856
|
|
system.ruby.network.routers1.throttle0.link_utilization 7.475588
|
|
system.ruby.network.routers1.throttle0.msg_count.Control::2 1377
|
|
system.ruby.network.routers1.throttle0.msg_count.Data::2 1373
|
|
system.ruby.network.routers1.throttle0.msg_bytes.Control::2 11016
|
|
system.ruby.network.routers1.throttle0.msg_bytes.Data::2 98856
|
|
system.ruby.network.routers1.throttle1.link_utilization 7.493006
|
|
system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1377
|
|
system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1373
|
|
system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 99144
|
|
system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 10984
|
|
system.ruby.network.routers2.throttle0.link_utilization 7.493006
|
|
system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1377
|
|
system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1373
|
|
system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 99144
|
|
system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 10984
|
|
system.ruby.network.routers2.throttle1.link_utilization 7.475588
|
|
system.ruby.network.routers2.throttle1.msg_count.Control::2 1377
|
|
system.ruby.network.routers2.throttle1.msg_count.Data::2 1373
|
|
system.ruby.network.routers2.throttle1.msg_bytes.Control::2 11016
|
|
system.ruby.network.routers2.throttle1.msg_bytes.Data::2 98856
|
|
system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1
|
|
system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1
|
|
system.ruby.delayVCHist.vnet_1::samples 1377 # delay histogram for vnet_1
|
|
system.ruby.delayVCHist.vnet_1 | 1377 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
|
|
system.ruby.delayVCHist.vnet_1::total 1377 # delay histogram for vnet_1
|
|
system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2
|
|
system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2
|
|
system.ruby.delayVCHist.vnet_2::samples 1373 # delay histogram for vnet_2
|
|
system.ruby.delayVCHist.vnet_2 | 1373 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
|
|
system.ruby.delayVCHist.vnet_2::total 1373 # delay histogram for vnet_2
|
|
system.ruby.LD.latency_hist_seqr::bucket_size 32
|
|
system.ruby.LD.latency_hist_seqr::max_bucket 319
|
|
system.ruby.LD.latency_hist_seqr::samples 1045
|
|
system.ruby.LD.latency_hist_seqr::mean 23.607656
|
|
system.ruby.LD.latency_hist_seqr::gmean 6.057935
|
|
system.ruby.LD.latency_hist_seqr::stdev 29.475705
|
|
system.ruby.LD.latency_hist_seqr | 546 52.25% 52.25% | 330 31.58% 83.83% | 162 15.50% 99.33% | 1 0.10% 99.43% | 4 0.38% 99.81% | 1 0.10% 99.90% | 0 0.00% 99.90% | 1 0.10% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.latency_hist_seqr::total 1045
|
|
system.ruby.LD.hit_latency_hist_seqr::bucket_size 1
|
|
system.ruby.LD.hit_latency_hist_seqr::max_bucket 9
|
|
system.ruby.LD.hit_latency_hist_seqr::samples 546
|
|
system.ruby.LD.hit_latency_hist_seqr::mean 1
|
|
system.ruby.LD.hit_latency_hist_seqr::gmean 1
|
|
system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 546 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.hit_latency_hist_seqr::total 546
|
|
system.ruby.LD.miss_latency_hist_seqr::bucket_size 32
|
|
system.ruby.LD.miss_latency_hist_seqr::max_bucket 319
|
|
system.ruby.LD.miss_latency_hist_seqr::samples 499
|
|
system.ruby.LD.miss_latency_hist_seqr::mean 48.344689
|
|
system.ruby.LD.miss_latency_hist_seqr::gmean 43.484561
|
|
system.ruby.LD.miss_latency_hist_seqr::stdev 25.453032
|
|
system.ruby.LD.miss_latency_hist_seqr | 0 0.00% 0.00% | 330 66.13% 66.13% | 162 32.46% 98.60% | 1 0.20% 98.80% | 4 0.80% 99.60% | 1 0.20% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.miss_latency_hist_seqr::total 499
|
|
system.ruby.ST.latency_hist_seqr::bucket_size 64
|
|
system.ruby.ST.latency_hist_seqr::max_bucket 639
|
|
system.ruby.ST.latency_hist_seqr::samples 935
|
|
system.ruby.ST.latency_hist_seqr::mean 16.455615
|
|
system.ruby.ST.latency_hist_seqr::gmean 2.877223
|
|
system.ruby.ST.latency_hist_seqr::stdev 34.720603
|
|
system.ruby.ST.latency_hist_seqr | 821 87.81% 87.81% | 102 10.91% 98.72% | 6 0.64% 99.36% | 2 0.21% 99.57% | 2 0.21% 99.79% | 2 0.21% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.latency_hist_seqr::total 935
|
|
system.ruby.ST.hit_latency_hist_seqr::bucket_size 1
|
|
system.ruby.ST.hit_latency_hist_seqr::max_bucket 9
|
|
system.ruby.ST.hit_latency_hist_seqr::samples 681
|
|
system.ruby.ST.hit_latency_hist_seqr::mean 1
|
|
system.ruby.ST.hit_latency_hist_seqr::gmean 1
|
|
system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 681 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.hit_latency_hist_seqr::total 681
|
|
system.ruby.ST.miss_latency_hist_seqr::bucket_size 64
|
|
system.ruby.ST.miss_latency_hist_seqr::max_bucket 639
|
|
system.ruby.ST.miss_latency_hist_seqr::samples 254
|
|
system.ruby.ST.miss_latency_hist_seqr::mean 57.893701
|
|
system.ruby.ST.miss_latency_hist_seqr::gmean 48.924758
|
|
system.ruby.ST.miss_latency_hist_seqr::stdev 45.645746
|
|
system.ruby.ST.miss_latency_hist_seqr | 140 55.12% 55.12% | 102 40.16% 95.28% | 6 2.36% 97.64% | 2 0.79% 98.43% | 2 0.79% 99.21% | 2 0.79% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.miss_latency_hist_seqr::total 254
|
|
system.ruby.IFETCH.latency_hist_seqr::bucket_size 64
|
|
system.ruby.IFETCH.latency_hist_seqr::max_bucket 639
|
|
system.ruby.IFETCH.latency_hist_seqr::samples 6864
|
|
system.ruby.IFETCH.latency_hist_seqr::mean 6.251748
|
|
system.ruby.IFETCH.latency_hist_seqr::gmean 1.432185
|
|
system.ruby.IFETCH.latency_hist_seqr::stdev 19.434647
|
|
system.ruby.IFETCH.latency_hist_seqr | 6521 95.00% 95.00% | 324 4.72% 99.72% | 15 0.22% 99.94% | 1 0.01% 99.96% | 1 0.01% 99.97% | 2 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.IFETCH.latency_hist_seqr::total 6864
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::samples 6241
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::mean 1
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1
|
|
system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 6241 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::total 6241
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::samples 623
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::mean 58.861958
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::gmean 52.329270
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::stdev 33.443818
|
|
system.ruby.IFETCH.miss_latency_hist_seqr | 280 44.94% 44.94% | 324 52.01% 96.95% | 15 2.41% 99.36% | 1 0.16% 99.52% | 1 0.16% 99.68% | 2 0.32% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::total 623
|
|
system.ruby.RMW_Read.latency_hist_seqr::bucket_size 4
|
|
system.ruby.RMW_Read.latency_hist_seqr::max_bucket 39
|
|
system.ruby.RMW_Read.latency_hist_seqr::samples 8
|
|
system.ruby.RMW_Read.latency_hist_seqr::mean 4.875000
|
|
system.ruby.RMW_Read.latency_hist_seqr::gmean 1.542211
|
|
system.ruby.RMW_Read.latency_hist_seqr::stdev 10.960155
|
|
system.ruby.RMW_Read.latency_hist_seqr | 7 87.50% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 1 12.50% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.latency_hist_seqr::total 8
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::bucket_size 1
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::max_bucket 9
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::samples 7
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::mean 1
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::gmean 1
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr | 0 0.00% 0.00% | 7 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::total 7
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::bucket_size 4
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::max_bucket 39
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::samples 1
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::mean 32
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::gmean 32
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::stdev nan
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::total 1
|
|
system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64
|
|
system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639
|
|
system.ruby.Directory.miss_mach_latency_hist_seqr::samples 1377
|
|
system.ruby.Directory.miss_mach_latency_hist_seqr::mean 54.852578
|
|
system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 48.312712
|
|
system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 33.880423
|
|
system.ruby.Directory.miss_mach_latency_hist_seqr | 751 54.54% 54.54% | 589 42.77% 97.31% | 26 1.89% 99.20% | 4 0.29% 99.49% | 3 0.22% 99.71% | 4 0.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Directory.miss_mach_latency_hist_seqr::total 1377
|
|
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9
|
|
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan
|
|
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9
|
|
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev nan
|
|
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket 9
|
|
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev nan
|
|
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size 8
|
|
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket 79
|
|
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1
|
|
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75
|
|
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000
|
|
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan
|
|
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00%
|
|
system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1
|
|
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 32
|
|
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 319
|
|
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 499
|
|
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 48.344689
|
|
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 43.484561
|
|
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 25.453032
|
|
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 330 66.13% 66.13% | 162 32.46% 98.60% | 1 0.20% 98.80% | 4 0.80% 99.60% | 1 0.20% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 499
|
|
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
|
|
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
|
|
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 254
|
|
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 57.893701
|
|
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 48.924758
|
|
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 45.645746
|
|
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 140 55.12% 55.12% | 102 40.16% 95.28% | 6 2.36% 97.64% | 2 0.79% 98.43% | 2 0.79% 99.21% | 2 0.79% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 254
|
|
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
|
|
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
|
|
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 623
|
|
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 58.861958
|
|
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 52.329270
|
|
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 33.443818
|
|
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 280 44.94% 44.94% | 324 52.01% 96.95% | 15 2.41% 99.36% | 1 0.16% 99.52% | 1 0.16% 99.68% | 2 0.32% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 623
|
|
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::bucket_size 4
|
|
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::max_bucket 39
|
|
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::samples 1
|
|
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::mean 32
|
|
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::gmean 32
|
|
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::stdev nan
|
|
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::total 1
|
|
system.ruby.Directory_Controller.GETX 1377 0.00% 0.00%
|
|
system.ruby.Directory_Controller.PUTX 1373 0.00% 0.00%
|
|
system.ruby.Directory_Controller.Memory_Data 1377 0.00% 0.00%
|
|
system.ruby.Directory_Controller.Memory_Ack 1373 0.00% 0.00%
|
|
system.ruby.Directory_Controller.I.GETX 1377 0.00% 0.00%
|
|
system.ruby.Directory_Controller.M.PUTX 1373 0.00% 0.00%
|
|
system.ruby.Directory_Controller.IM.Memory_Data 1377 0.00% 0.00%
|
|
system.ruby.Directory_Controller.MI.Memory_Ack 1373 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.Load 1045 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.Ifetch 6864 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.Store 943 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.Data 1377 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.Replacement 1373 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.Writeback_Ack 1373 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.I.Load 499 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.I.Ifetch 623 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.I.Store 255 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.M.Load 546 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.M.Ifetch 6241 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.M.Store 688 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.M.Replacement 1373 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.MI.Writeback_Ack 1373 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.IS.Data 1122 0.00% 0.00%
|
|
system.ruby.L1Cache_Controller.IM.Data 255 0.00% 0.00%
|
|
|
|
---------- End Simulation Statistics ----------
|