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gem5/tests/test1/ref/alpha/detailed/config.out
Kevin Lim 4bd025742d Put regression tests back into m5. They are located in the "tests" directory. The directory output and reference outputs have changed slightly. Now the directory is ALPHA_SE/test/<test>/<cpu_model>/, and for the reference stats <test>/ref/<arch>/<cpu_model> 
Right now only non-SMT SE regression tests have been added back in.  The rest are pending getting SMT working, and consolidating the FS configuration files.

Eventually support for different OSs can be added so you can specify which versions of the binary you want to run from one config file.

Note: mp-test1 doesn't have any reference stats because MP mode doesn't currently work.  The test itself should probably work once the code is fixed.

SConstruct:
    Updates to allow for regression tests to work via the command line "scons build/ALPHA_SE/test/debug/quick" and such once again.
src/cpu/SConscript:
    Keep a list of SMT supporting CPUs so that the regression tests can easily specify which CPUs to use if they are SMT only.

--HG--
extra : convert_revision : 34e6286150aae8f316ae694f6c00be8f510522f2
2006-07-19 16:07:25 -04:00

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[root]
type=Root
clock=1000000000000
max_tick=0
progress_interval=0
output_file=cout
[system.physmem]
type=PhysicalMemory
file=
// range not specified
latency=1
[system]
type=System
physmem=system.physmem
mem_mode=atomic
[system.workload]
type=EioProcess
file=/z/ktlim2/clean/newmem-merge/tests/test-progs/anagram/bin/anagram-vshort.eio.gz
chkpt=
output=cout
system=system
[system.cpu0.mem]
type=Bus
bus_id=0
[system.cpu0.checker]
type=O3Checker
max_insts_any_thread=0
max_insts_all_threads=0
max_loads_any_thread=0
max_loads_all_threads=0
workload=system.workload
clock=1
defer_registration=false
exitOnError=true
warnOnlyOnLoadError=false
function_trace=false
function_trace_start=0
[system.cpu0.fuPool.FUList0.opList0]
type=OpDesc
opClass=IntAlu
opLat=1
issueLat=1
[system.cpu0.fuPool.FUList0]
type=FUDesc
opList=system.cpu0.fuPool.FUList0.opList0
count=6
[system.cpu0.fuPool.FUList1.opList0]
type=OpDesc
opClass=IntMult
opLat=3
issueLat=1
[system.cpu0.fuPool.FUList1.opList1]
type=OpDesc
opClass=IntDiv
opLat=20
issueLat=19
[system.cpu0.fuPool.FUList1]
type=FUDesc
opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1
count=2
[system.cpu0.fuPool.FUList2.opList0]
type=OpDesc
opClass=FloatAdd
opLat=2
issueLat=1
[system.cpu0.fuPool.FUList2.opList1]
type=OpDesc
opClass=FloatCmp
opLat=2
issueLat=1
[system.cpu0.fuPool.FUList2.opList2]
type=OpDesc
opClass=FloatCvt
opLat=2
issueLat=1
[system.cpu0.fuPool.FUList2]
type=FUDesc
opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2
count=4
[system.cpu0.fuPool.FUList3.opList0]
type=OpDesc
opClass=FloatMult
opLat=4
issueLat=1
[system.cpu0.fuPool.FUList3.opList1]
type=OpDesc
opClass=FloatDiv
opLat=12
issueLat=12
[system.cpu0.fuPool.FUList3.opList2]
type=OpDesc
opClass=FloatSqrt
opLat=24
issueLat=24
[system.cpu0.fuPool.FUList3]
type=FUDesc
opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2
count=2
[system.cpu0.fuPool.FUList4.opList0]
type=OpDesc
opClass=MemRead
opLat=1
issueLat=1
[system.cpu0.fuPool.FUList4]
type=FUDesc
opList=system.cpu0.fuPool.FUList4.opList0
count=0
[system.cpu0.fuPool.FUList5.opList0]
type=OpDesc
opClass=MemWrite
opLat=1
issueLat=1
[system.cpu0.fuPool.FUList5]
type=FUDesc
opList=system.cpu0.fuPool.FUList5.opList0
count=0
[system.cpu0.fuPool.FUList6.opList0]
type=OpDesc
opClass=MemRead
opLat=1
issueLat=1
[system.cpu0.fuPool.FUList6.opList1]
type=OpDesc
opClass=MemWrite
opLat=1
issueLat=1
[system.cpu0.fuPool.FUList6]
type=FUDesc
opList=system.cpu0.fuPool.FUList6.opList0 system.cpu0.fuPool.FUList6.opList1
count=4
[system.cpu0.fuPool.FUList7.opList0]
type=OpDesc
opClass=IprAccess
opLat=3
issueLat=3
[system.cpu0.fuPool.FUList7]
type=FUDesc
opList=system.cpu0.fuPool.FUList7.opList0
count=1
[system.cpu0.fuPool]
type=FUPool
FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7
[system.cpu0]
type=DerivO3CPU
clock=1
numThreads=1
activity=0
workload=system.workload
mem=system.cpu0.mem
checker=system.cpu0.checker
max_insts_any_thread=500000
max_insts_all_threads=0
max_loads_any_thread=0
max_loads_all_threads=0
cachePorts=200
decodeToFetchDelay=1
renameToFetchDelay=1
iewToFetchDelay=1
commitToFetchDelay=1
fetchWidth=8
renameToDecodeDelay=1
iewToDecodeDelay=1
commitToDecodeDelay=1
fetchToDecodeDelay=1
decodeWidth=8
iewToRenameDelay=1
commitToRenameDelay=1
decodeToRenameDelay=1
renameWidth=8
commitToIEWDelay=1
renameToIEWDelay=2
issueToExecuteDelay=1
dispatchWidth=8
issueWidth=8
wbWidth=8
wbDepth=1
fuPool=system.cpu0.fuPool
iewToCommitDelay=1
renameToROBDelay=1
commitWidth=8
squashWidth=8
trapLatency=6
backComSize=5
forwardComSize=5
predType=tournament
localPredictorSize=2048
localCtrBits=2
localHistoryTableSize=2048
localHistoryBits=11
globalPredictorSize=8192
globalCtrBits=2
globalHistoryBits=13
choicePredictorSize=8192
choiceCtrBits=2
BTBEntries=4096
BTBTagSize=16
RASSize=16
LQEntries=32
SQEntries=32
LFSTSize=1024
SSITSize=1024
numPhysIntRegs=256
numPhysFloatRegs=256
numIQEntries=64
numROBEntries=192
smtNumFetchingThreads=1
smtFetchPolicy=SingleThread
smtLSQPolicy=Partitioned
smtLSQThreshold=100
smtIQPolicy=Partitioned
smtIQThreshold=100
smtROBPolicy=Partitioned
smtROBThreshold=100
smtCommitPolicy=RoundRobin
instShiftAmt=2
defer_registration=false
function_trace=false
function_trace_start=0
[trace]
flags=
start=0
bufsize=0
file=cout
dump_on_exit=false
ignore=
[stats]
descriptions=true
project_name=test
simulation_name=test
simulation_sample=0
text_file=m5stats.txt
text_compat=true
mysql_db=
mysql_user=
mysql_password=
mysql_host=
events_start=-1
dump_reset=false
dump_cycle=0
dump_period=0
ignore_events=
[random]
seed=1
[exetrace]
speculative=true
print_cycle=true
print_opclass=true
print_thread=true
print_effaddr=true
print_data=true
print_iregs=false
print_fetchseq=false
print_cpseq=false
pc_symbol=true
intel_format=false
trace_system=client
[debug]
break_cycles=
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