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Andreas Sandberg 4aeaaf7985 dev, arm: Split MCC and DCC subsystems
Devices behind the Versatile Express configuration controllers are
currently all lumped into one SimObject. This will make DTB generation
challenging since the DTB assumes them to be in different parts of the
hierarchy. It also makes it hard to model other CoreTiles without also
replicating devices from the motherboard.

This changeset splits the VExpressCoreTileCtrl into two subsystems:
VExpressMCC for all motherboard-related devices and CoreTile2A15DCC
for Core Tile specific devices.
2015-12-04 00:19:05 +00:00
build_opts scons: Do not build the InOrderCPU 2015-01-20 08:12:45 -05:00
configs config: Added missing types to JSON/INI Python reader 2015-11-22 05:10:21 -05:00
ext ext: fix SST connector 2015-10-06 18:08:28 -05:00
src dev, arm: Split MCC and DCC subsystems 2015-12-04 00:19:05 +00:00
system arm: Add support for ARMv8 (AArch64 & AArch32) 2014-01-24 15:29:34 -06:00
tests stats: Bump stats to match current behaviour 2015-12-02 09:58:24 -05:00
util sim: Update C++ config example to match SystemC example 2015-09-10 16:10:49 +01:00
.hgignore misc: ignore object files and static libs in util/m5 2015-11-13 17:03:48 -05:00
.hgtags Added tag stable_2015_09_03 for changeset 60eb3fef9c2d 2015-09-03 15:38:46 -05:00
COPYING copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
LICENSE copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
README misc: README direct to website for dependencies 2014-08-26 10:12:04 -04:00
SConstruct sim: Add support for generating back traces on errors 2015-12-04 00:12:58 +00:00

This is the gem5 simulator.

The main website can be found at http://www.gem5.org

A good starting point is http://www.gem5.org/Introduction, and for
more information about building the simulator and getting started
please see http://www.gem5.org/Documentation and
http://www.gem5.org/Tutorials.

To build gem5, you will need the following software: g++ or clang,
Python (gem5 links in the Python interpreter), SCons, SWIG, zlib, m4,
and lastly protobuf if you want trace capture and playback
support. Please see http://www.gem5.org/Dependencies for more details
concerning the minimum versions of the aforementioned tools.

Once you have all dependencies resolved, type 'scons
build/<ARCH>/gem5.opt' where ARCH is one of ALPHA, ARM, NULL, MIPS,
POWER, SPARC, or X86. This will build an optimized version of the gem5
binary (gem5.opt) for the the specified architecture. See
http://www.gem5.org/Build_System for more details and options.

With the simulator built, have a look at
http://www.gem5.org/Running_gem5 for more information on how to use
gem5.

The basic source release includes these subdirectories:
   - configs: example simulation configuration scripts
   - ext: less-common external packages needed to build gem5
   - src: source code of the gem5 simulator
   - system: source for some optional system software for simulated systems
   - tests: regression tests
   - util: useful utility programs and files

To run full-system simulations, you will need compiled system firmware
(console and PALcode for Alpha), kernel binaries and one or more disk
images. Please see the gem5 download page for these items at
http://www.gem5.org/Download

If you have questions, please send mail to gem5-users@gem5.org

Enjoy using gem5 and please share your modifications and extensions.