gem5/src/arch/sparc/isa
Gabe Black 4a16ea95c1 Fix the Frs?s operands to use single width by default, rather than double width.
--HG--
extra : convert_revision : 36137ee025dc5c79665b041b43bd89505715ca70
2007-01-29 22:54:28 -05:00
..
formats Cleaned up disassembly a little. 2007-01-29 10:49:59 -05:00
base.isa Merge zizzer:/bk/newmem 2007-01-27 01:59:20 -05:00
bitfields.isa Fix the FCMPCC bitfield. 2007-01-29 22:46:01 -05:00
decoder.isa Add implementation for the fcmp instructions. These don't behave -quite- right with respect to quite NaNs, but hopefully we don't need to worry about the distinction. 2007-01-29 22:52:54 -05:00
includes.isa Merge zizzer:/bk/newmem 2007-01-27 01:59:20 -05:00
main.isa Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description. 2006-10-23 07:55:52 -04:00
operands.isa Fix the Frs?s operands to use single width by default, rather than double width. 2007-01-29 22:54:28 -05:00