7c708c8d1b
This lets us centralize priorities so we can see what's going on.
- Shift serialize & cpu-switch events to happen before CPU ticks (to be
consistent with starting new CPU on same cycle instead of next cycle).
- Get rid of unnecessary bus stats reset callback.
cpu/simple_cpu/simple_cpu.cc:
sim/debug.cc:
sim/eventq.hh:
sim/serialize.cc:
sim/sim_events.cc:
sim/sim_events.hh:
Switch events to use a priority enum instead of integers.
This lets us centralize priorities so we can see what's going on.
--HG--
extra : convert_revision : 510d79b43c0a1c97a10eb65916f7335b1de8b956
132 lines
3.4 KiB
C++
132 lines
3.4 KiB
C++
/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <signal.h>
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#include <unistd.h>
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#include <string>
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#include <vector>
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#include "sim/debug.hh"
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#include "sim/eventq.hh"
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#include "sim/param.hh"
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#include "sim/sim_events.hh"
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using namespace std;
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void
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debug_break()
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{
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kill(getpid(), SIGTRAP);
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}
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//
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// Debug event: place a breakpoint on the process function and
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// schedule the event to break at a particular cycle
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//
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class DebugBreakEvent : public Event
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{
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public:
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DebugBreakEvent(EventQueue *q, Tick _when);
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void process(); // process event
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virtual const char *description();
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};
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//
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// constructor: schedule at specified time
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//
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DebugBreakEvent::DebugBreakEvent(EventQueue *q, Tick _when)
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: Event(q, Debug_Break_Pri)
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{
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setFlags(AutoDelete);
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schedule(_when);
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}
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//
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// handle debug event: set debugger breakpoint on this function
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//
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void
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DebugBreakEvent::process()
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{
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debug_break();
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}
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const char *
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DebugBreakEvent::description()
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{
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return "debug break";
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}
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//
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// Parameter context for global debug options
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//
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class DebugContext : public ParamContext
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{
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public:
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DebugContext(const string &_iniSection)
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: ParamContext(_iniSection) {}
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void checkParams();
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};
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DebugContext debugParams("debug");
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VectorParam<Tick> break_cycles(&debugParams, "break_cycles",
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"cycle(s) to create breakpoint events");
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void
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DebugContext::checkParams()
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{
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if (break_cycles.isValid()) {
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vector<Tick> &cycles = break_cycles;
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vector<Tick>::iterator i = cycles.begin();
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vector<Tick>::iterator end = cycles.end();
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for (; i < end; ++i)
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new DebugBreakEvent(&mainEventQueue, *i);
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}
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}
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//
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// handy function to schedule DebugBreakEvent on main event queue
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// (callable from debugger)
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//
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extern "C" void sched_break_cycle(Tick when)
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{
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new DebugBreakEvent(&mainEventQueue, when);
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}
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extern "C" void eventq_dump()
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{
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mainEventQueue.dump();
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}
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