4875b33467
first crack at io devices code
made CpuRequest that derives from Request
dev/io_device.cc:
dev/io_device.hh:
first crack at the classes for Pio and Dma devices
dev/platform.hh:
We are going to a system pointer to get info about the memory system
mem/bus.hh:
changed sendresult -> bool,tick,void as appropriate
mem/port.hh:
changed sendresult -> bool,tick,void as appropriate;
removed the sendTiming(pkt,t) call since it is not really
implementable in a generic fashion
mem/request.hh:
pulled items from Request into CpuRequest
--HG--
extra : convert_revision : 6213cf2b66417fa023b80884d9e623e78f5aa891
72 lines
2.5 KiB
C++
72 lines
2.5 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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* Generic interface for platforms
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*/
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#ifndef __DEV_PLATFORM_HH__
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#define __DEV_PLATFORM_HH__
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#include "sim/sim_object.hh"
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#include "targetarch/isa_traits.hh"
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class PciConfigAll;
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class IntrControl;
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class SimConsole;
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class Uart;
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class System;
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class Platform : public SimObject
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{
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public:
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/** Pointer to the interrupt controller */
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IntrControl *intrctrl;
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/** Pointer to the PCI configuration space */
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PciConfigAll *pciconfig;
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/** Pointer to the UART, set by the uart */
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Uart *uart;
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/** Pointer to the system for info about the memory system. */
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System *system;
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public:
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Platform(const std::string &name, IntrControl *intctrl, PciConfigAll *pci);
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virtual ~Platform();
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virtual void postConsoleInt() = 0;
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virtual void clearConsoleInt() = 0;
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virtual Tick intrFrequency() = 0;
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virtual void postPciInt(int line);
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virtual void clearPciInt(int line);
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virtual Addr pciToDma(Addr pciAddr) const;
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};
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#endif // __DEV_PLATFORM_HH__
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