gem5/src/arch
Gabe Black 4779020e13 ARM: Fix the integer register indexes.
The PC indexes in the various register sets was defined in the section for
unaliased registers which was throwing off the indexing. This moves those
where they belong. Also, to make detecting accesses to the PC easier and
because it's in the same place in all modes, the intRegForceUser function
now passes it through as index 15.
2009-11-10 20:19:55 -08:00
..
alpha Syscalls: Make system calls access arguments like a stack, not an array. 2009-10-30 00:44:55 -07:00
arm ARM: Fix the integer register indexes. 2009-11-10 20:19:55 -08:00
mips build: fix compile problems pointed out by gcc 4.4 2009-11-04 16:57:01 -08:00
power Syscalls: Make system calls access arguments like a stack, not an array. 2009-10-30 00:44:55 -07:00
sparc Syscalls: Make system calls access arguments like a stack, not an array. 2009-10-30 00:44:55 -07:00
x86 X86: Fix bugs in movd implementation. 2009-11-10 11:29:30 -05:00
isa_parser.py compile: wrap 64bit numbers with ULL() so 32bit compiles work 2009-11-08 13:31:59 -08:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00