192 lines
5.4 KiB
C++
192 lines
5.4 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Kevin Lim
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*/
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#include "base/output.hh"
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#include "cpu/base.hh"
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#include "cpu/profile.hh"
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#include "cpu/thread_state.hh"
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#include "mem/port.hh"
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#include "mem/translating_port.hh"
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#include "sim/serialize.hh"
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#if FULL_SYSTEM
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#include "arch/kernel_stats.hh"
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#include "cpu/quiesce_event.hh"
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#include "mem/vport.hh"
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#endif
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#if FULL_SYSTEM
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ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid)
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#else
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ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
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#endif
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: numInst(0), numLoad(0), _status(ThreadContext::Halted),
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baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
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#if FULL_SYSTEM
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profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
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kernelStats(NULL), physPort(NULL), virtPort(NULL),
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#else
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port(NULL), process(_process),
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#endif
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funcExeInst(0), storeCondFailures(0)
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{
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}
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ThreadState::~ThreadState()
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{
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#if !FULL_SYSTEM
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if (port) {
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delete port->getPeer();
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delete port;
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}
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#endif
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}
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void
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ThreadState::serialize(std::ostream &os)
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{
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SERIALIZE_ENUM(_status);
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// thread_num and cpu_id are deterministic from the config
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SERIALIZE_SCALAR(funcExeInst);
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SERIALIZE_SCALAR(inst);
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#if FULL_SYSTEM
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Tick quiesceEndTick = 0;
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if (quiesceEvent->scheduled())
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quiesceEndTick = quiesceEvent->when();
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SERIALIZE_SCALAR(quiesceEndTick);
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if (kernelStats)
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kernelStats->serialize(os);
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#endif
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}
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void
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ThreadState::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_ENUM(_status);
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// thread_num and cpu_id are deterministic from the config
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UNSERIALIZE_SCALAR(funcExeInst);
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UNSERIALIZE_SCALAR(inst);
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#if FULL_SYSTEM
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Tick quiesceEndTick;
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UNSERIALIZE_SCALAR(quiesceEndTick);
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if (quiesceEndTick)
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baseCpu->schedule(quiesceEvent, quiesceEndTick);
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if (kernelStats)
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kernelStats->unserialize(cp, section);
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#endif
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}
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#if FULL_SYSTEM
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void
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ThreadState::connectMemPorts(ThreadContext *tc)
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{
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connectPhysPort();
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connectVirtPort(tc);
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}
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void
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ThreadState::connectPhysPort()
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{
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// @todo: For now this disregards any older port that may have
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// already existed. Fix this memory leak once the bus port IDs
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// for functional ports is resolved.
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if (physPort)
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physPort->removeConn();
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else
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physPort = new FunctionalPort(csprintf("%s-%d-funcport",
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baseCpu->name(), _threadId));
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connectToMemFunc(physPort);
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}
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void
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ThreadState::connectVirtPort(ThreadContext *tc)
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{
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// @todo: For now this disregards any older port that may have
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// already existed. Fix this memory leak once the bus port IDs
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// for functional ports is resolved.
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if (virtPort)
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virtPort->removeConn();
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else
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virtPort = new VirtualPort(csprintf("%s-%d-vport",
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baseCpu->name(), _threadId), tc);
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connectToMemFunc(virtPort);
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}
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void
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ThreadState::profileClear()
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{
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if (profile)
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profile->clear();
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}
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void
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ThreadState::profileSample()
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{
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if (profile)
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profile->sample(profileNode, profilePC);
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}
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#else
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TranslatingPort *
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ThreadState::getMemPort()
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{
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if (port != NULL)
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return port;
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/* Use this port to for syscall emulation writes to memory. */
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port = new TranslatingPort(csprintf("%s-%d-funcport", baseCpu->name(), _threadId),
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process, TranslatingPort::NextPage);
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connectToMemFunc(port);
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return port;
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}
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#endif
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void
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ThreadState::connectToMemFunc(Port *port)
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{
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Port *dcache_port, *func_mem_port;
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dcache_port = baseCpu->getPort("dcache_port");
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assert(dcache_port != NULL);
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MemObject *mem_object = dcache_port->getPeer()->getOwner();
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assert(mem_object != NULL);
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func_mem_port = mem_object->getPort("functional");
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assert(func_mem_port != NULL);
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func_mem_port->setPeer(port);
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port->setPeer(func_mem_port);
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}
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