304 lines
7.6 KiB
C++
304 lines
7.6 KiB
C++
/*
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* Copyright (c) 2001-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Steve Reinhardt
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* Nathan Binkert
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* Lisa Hsu
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* Kevin Lim
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*/
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#include <string>
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#include "arch/isa_traits.hh"
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#include "config/the_isa.hh"
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#include "cpu/base.hh"
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#include "cpu/simple_thread.hh"
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#include "cpu/thread_context.hh"
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#include "params/BaseCPU.hh"
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#if FULL_SYSTEM
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#include "arch/kernel_stats.hh"
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#include "arch/stacktrace.hh"
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#include "base/callback.hh"
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#include "base/cprintf.hh"
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#include "base/output.hh"
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#include "base/trace.hh"
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#include "cpu/profile.hh"
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#include "cpu/quiesce_event.hh"
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#include "sim/serialize.hh"
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#include "sim/sim_exit.hh"
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#else
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#include "mem/translating_port.hh"
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#include "sim/process.hh"
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#include "sim/system.hh"
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#endif
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using namespace std;
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// constructor
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#if FULL_SYSTEM
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SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
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TheISA::TLB *_itb, TheISA::TLB *_dtb,
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bool use_kernel_stats)
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: ThreadState(_cpu, _thread_num),
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cpu(_cpu), system(_sys), itb(_itb), dtb(_dtb)
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{
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tc = new ProxyThreadContext<SimpleThread>(this);
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quiesceEvent = new EndQuiesceEvent(tc);
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clearArchRegs();
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if (cpu->params()->profile) {
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profile = new FunctionProfile(system->kernelSymtab);
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Callback *cb =
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new MakeCallback<SimpleThread,
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&SimpleThread::dumpFuncProfile>(this);
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registerExitCallback(cb);
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}
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// let's fill with a dummy node for now so we don't get a segfault
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// on the first cycle when there's no node available.
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static ProfileNode dummyNode;
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profileNode = &dummyNode;
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profilePC = 3;
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if (use_kernel_stats)
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kernelStats = new TheISA::Kernel::Statistics(system);
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}
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#else
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SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
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TheISA::TLB *_itb, TheISA::TLB *_dtb)
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: ThreadState(_cpu, _thread_num, _process),
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cpu(_cpu), itb(_itb), dtb(_dtb)
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{
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clearArchRegs();
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tc = new ProxyThreadContext<SimpleThread>(this);
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}
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#endif
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SimpleThread::SimpleThread()
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#if FULL_SYSTEM
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: ThreadState(NULL, -1)
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#else
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: ThreadState(NULL, -1, NULL)
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#endif
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{
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tc = new ProxyThreadContext<SimpleThread>(this);
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}
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SimpleThread::~SimpleThread()
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{
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#if FULL_SYSTEM
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delete physPort;
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delete virtPort;
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#endif
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delete tc;
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}
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void
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SimpleThread::takeOverFrom(ThreadContext *oldContext)
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{
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// some things should already be set up
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#if FULL_SYSTEM
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assert(system == oldContext->getSystemPtr());
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#else
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assert(process == oldContext->getProcessPtr());
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#endif
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copyState(oldContext);
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#if FULL_SYSTEM
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EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
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if (quiesce) {
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// Point the quiesce event's TC at this TC so that it wakes up
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// the proper CPU.
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quiesce->tc = tc;
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}
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if (quiesceEvent) {
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quiesceEvent->tc = tc;
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}
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TheISA::Kernel::Statistics *stats = oldContext->getKernelStats();
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if (stats) {
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kernelStats = stats;
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}
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#endif
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storeCondFailures = 0;
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oldContext->setStatus(ThreadContext::Halted);
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}
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void
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SimpleThread::copyTC(ThreadContext *context)
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{
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copyState(context);
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#if FULL_SYSTEM
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EndQuiesceEvent *quiesce = context->getQuiesceEvent();
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if (quiesce) {
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quiesceEvent = quiesce;
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}
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TheISA::Kernel::Statistics *stats = context->getKernelStats();
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if (stats) {
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kernelStats = stats;
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}
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#endif
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}
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void
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SimpleThread::copyState(ThreadContext *oldContext)
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{
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// copy over functional state
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_status = oldContext->status();
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copyArchRegs(oldContext);
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#if !FULL_SYSTEM
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funcExeInst = oldContext->readFuncExeInst();
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#endif
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inst = oldContext->getInst();
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_threadId = oldContext->threadId();
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_contextId = oldContext->contextId();
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}
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void
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SimpleThread::serialize(ostream &os)
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{
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ThreadState::serialize(os);
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SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
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SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
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SERIALIZE_SCALAR(microPC);
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SERIALIZE_SCALAR(nextMicroPC);
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SERIALIZE_SCALAR(PC);
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SERIALIZE_SCALAR(nextPC);
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SERIALIZE_SCALAR(nextNPC);
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// thread_num and cpu_id are deterministic from the config
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//
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// Now must serialize all the ISA dependent state
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//
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isa.serialize(cpu, os);
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}
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void
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SimpleThread::unserialize(Checkpoint *cp, const std::string §ion)
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{
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ThreadState::unserialize(cp, section);
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UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
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UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
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UNSERIALIZE_SCALAR(microPC);
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UNSERIALIZE_SCALAR(nextMicroPC);
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UNSERIALIZE_SCALAR(PC);
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UNSERIALIZE_SCALAR(nextPC);
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UNSERIALIZE_SCALAR(nextNPC);
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// thread_num and cpu_id are deterministic from the config
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//
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// Now must unserialize all the ISA dependent state
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//
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isa.unserialize(cpu, cp, section);
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}
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#if FULL_SYSTEM
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void
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SimpleThread::dumpFuncProfile()
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{
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std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
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profile->dump(tc, *os);
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}
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#endif
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void
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SimpleThread::activate(int delay)
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{
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if (status() == ThreadContext::Active)
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return;
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lastActivate = curTick;
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// if (status() == ThreadContext::Unallocated) {
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// cpu->activateWhenReady(_threadId);
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// return;
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// }
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_status = ThreadContext::Active;
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// status() == Suspended
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cpu->activateContext(_threadId, delay);
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}
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void
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SimpleThread::suspend()
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{
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if (status() == ThreadContext::Suspended)
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return;
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lastActivate = curTick;
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lastSuspend = curTick;
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/*
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#if FULL_SYSTEM
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// Don't change the status from active if there are pending interrupts
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if (cpu->checkInterrupts()) {
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assert(status() == ThreadContext::Active);
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return;
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}
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#endif
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*/
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_status = ThreadContext::Suspended;
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cpu->suspendContext(_threadId);
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}
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void
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SimpleThread::halt()
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{
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if (status() == ThreadContext::Halted)
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return;
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_status = ThreadContext::Halted;
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cpu->haltContext(_threadId);
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}
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void
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SimpleThread::regStats(const string &name)
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{
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#if FULL_SYSTEM
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if (kernelStats)
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kernelStats->regStats(name + ".kern");
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#endif
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}
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void
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SimpleThread::copyArchRegs(ThreadContext *src_tc)
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{
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TheISA::copyRegs(src_tc, tc);
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}
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